loadpatents
name:-0.024245023727417
name:-0.013729095458984
name:-0.0061769485473633
Eskildsen; Steven Patent Filings

Eskildsen; Steven

Patent Applications and Registrations

Patent applications and USPTO patent grants for Eskildsen; Steven.The latest application filed is for "selection component that is configured based on an architecture associated with memory devices".

Company Profile
4.18.10
  • Eskildsen; Steven - Folsom CA
  • Eskildsen; Steven - Boise ID
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Apparatus having a multiplexer for passive input/output expansion
Grant 11,385,949 - Rajgopal , et al. July 12, 2
2022-07-12
Selection component that is configured based on an architecture associated with memory devices
Grant 11,347,415 - Rajgopal , et al. May 31, 2
2022-05-31
Selection Component That Is Configured Based On An Architecture Associated With Memory Devices
App 20210117115 - Rajgopal; Suresh ;   et al.
2021-04-22
Apparatus Having A Multiplexer For Passive Input/output Expansion
App 20210055979 - Rajgopal; Suresh ;   et al.
2021-02-25
Selection component that is configured based on an architecture associated with memory devices
Grant 10,877,678 - Rajgopal , et al. December 29, 2
2020-12-29
Apparatus having multiplexers for passive input/output expansion and methods of their operation
Grant 10,846,158 - Rajgopal , et al. November 24, 2
2020-11-24
Passive Input/output Expansion
App 20200110645 - Rajgopal; Suresh ;   et al.
2020-04-09
Selection Component That Is Configured Based On An Architecture Associated With Memory Devices
App 20190354301 - Rajgopal; Suresh ;   et al.
2019-11-21
Face down dual sided chip scale memory package
Grant 10,366,934 - Yoo , et al. July 30, 2
2019-07-30
Face Down Dual Sided Chip Scale Memory Package
App 20190088565 - Yoo; Chan ;   et al.
2019-03-21
Face Down Dual Sided Chip Scale Memory Package
App 20180358275 - Yoo; Chan ;   et al.
2018-12-13
Face down dual sided chip scale memory package
Grant 10,153,221 - Yoo , et al. Dec
2018-12-11
Package including an interposer having at least one topological feature
Grant 8,999,763 - Eskildsen , et al. April 7, 2
2015-04-07
Signal shifting to allow independent control of identical stacked memory modules
Grant 8,952,515 - Schenck , et al. February 10, 2
2015-02-10
Methods for receiving and transmitting voltage through the use of supply voltage or ground connections including bond pad interconnects for integrated circuit devices
Grant 8,860,496 - Abdulla , et al. October 14, 2
2014-10-14
Package Including An Interposer Having At Least One Topological Feature
App 20140287558 - Eskildsen; Steven ;   et al.
2014-09-25
Supply voltage or ground connections for integrated circuit device
Grant 8,829,693 - Abdulla , et al. September 9, 2
2014-09-09
Package including an interposer having at least one topological feature
Grant 8,749,074 - Eskildsen , et al. June 10, 2
2014-06-10
Supply Voltage Or Ground Connections For Integrated Circuit Device
App 20140015133 - Abdulla; Mostafa Naguib ;   et al.
2014-01-16
Supply Voltage Or Ground Connections Including Bond Pad Interconnects For Integrated Circuit Device
App 20140009218 - Abdulla; Mostafa Naguib ;   et al.
2014-01-09
Supply voltage or ground connections for integrated circuit device
Grant 8,536,716 - Abdulla , et al. September 17, 2
2013-09-17
Supply voltage or ground connections including bond pad interconnects for integrated circuit device
Grant 8,531,849 - Abdulla , et al. September 10, 2
2013-09-10
Signal shifting to allow independent control of identical stacked memory modules
Grant 8,198,717 - Schenck , et al. June 12, 2
2012-06-12
Package Including An Interposer Having At Least One Topological Feature
App 20110127659 - Eskildsen; Steven ;   et al.
2011-06-02

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