Eppich; Anton P.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Eppich; Anton P..The latest application filed is for "sub-resolution assist devices and methods".

Company Profile

0.18.14

Eppich; Anton P. - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated assemblies Grant 11,264,320 - Eppich March 1, 2	2022-03-01
Sub-resolution assist devices and methods Grant 9,128,383 - Eppich , et al. September 8, 2	2015-09-08
DRAM cell design with folded digitline sense amplifier Grant 8,952,437 - Wang , et al. February 10, 2	2015-02-10
Sub-resolution Assist Devices And Methods App 20140248554 - Eppich; Anton P. ; et al.	2014-09-04
Dram Cell Design With Folded Digitline Sense Amplifier App 20140241025 - WANG; FEI ; et al.	2014-08-28
Sub-resolution assist devices and methods Grant 8,736,811 - Eppich , et al. May 27, 2	2014-05-27
DRAM cell design with folded digitline sense amplifier Grant 8,716,772 - Wang , et al. May 6, 2	2014-05-06
Relaxed-pitch method of aligning active area to digit line Grant 8,354,317 - Eppich January 15, 2	2013-01-15
Memory cell with a vertically oriented transistor coupled to a digit line and method of forming the same Grant 8,183,615 - Eppich May 22, 2	2012-05-22
Sub-resolution Assist Devices And Methods App 20110235009 - Eppich; Anton P. ; et al.	2011-09-29
Relaxed-pitch Method Of Aligning Active Area To Digit Line App 20110156116 - Eppich; Anton P.	2011-06-30
Sub-resolution assist devices and methods Grant 7,961,292 - Eppich , et al. June 14, 2	2011-06-14
Relaxed-pitch method of aligning active area to digit line Grant 7,915,116 - Eppich March 29, 2	2011-03-29
Memory Cell With A Vertically Oriented Transistor Coupled To A Digit Line And Method Of Forming The Same App 20110042734 - Eppich; Anton P.	2011-02-24
Memory cell with buried digit line Grant 7,825,452 - Eppich November 2, 2	2010-11-02
Dram cell design with folded digitline architecture and angled active areas Grant 7,613,025 - Wang , et al. November 3, 2	2009-11-03
Relaxed-pitch Method Of Aligning Active Area To Digit Line App 20090215236 - Eppich; Anton P.	2009-08-27
Relaxed-pitch method of aligning active area to digit line Grant 7,541,632 - Eppich June 2, 2	2009-06-02
Sub-resolution Assist Devices And Methods App 20080278700 - Eppich; Anton P. ; et al.	2008-11-13
6f2 Dram Cell Design With 3f-pitch Folded Digitline Sense Amplifier App 20080137392 - Wang; Fei ; et al.	2008-06-12
6F.sup.2 DRAM cell design with 3F-pitch folded digitline sense amplifier Grant 7,349,232 - Wang , et al. March 25, 2	2008-03-25
Memory Cell With Buried Digit Line App 20080017905 - Eppich; Anton P.	2008-01-24
6F DRAM cell design with 3F-pitch folded digitline sense amplifier App 20070217245 - Wang; Fei ; et al.	2007-09-20
Memory array with overlapping buried digit line and active area and method for forming same Grant 7,271,057 - Eppich September 18, 2	2007-09-18
DRAM cell design with folded digitline sense amplifier App 20070145450 - Wang; Fei ; et al.	2007-06-28
Relaxed-pitch method of aligning active area to digit line App 20060278911 - Eppich; Anton P.	2006-12-14
Memory cell, array, device and system with overlapping buried digit line and active area and method for forming same Grant 7,042,047 - Eppich May 9, 2	2006-05-09
Memory array with overlapping buried digit line and active area and method for forming same App 20060043431 - Eppich; Anton P.	2006-03-02
Memory Cell, Array, Device And System With Overlapping Buried Digit Line And Active Area And Method For Forming Same App 20060043473 - Eppich; Anton P.	2006-03-02

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