loadpatents
name:-0.78648781776428
name:-0.26510715484619
name:-0.023660182952881
Engl; Reimund Patent Filings

Engl; Reimund

Patent Applications and Registrations

Patent applications and USPTO patent grants for Engl; Reimund.The latest application filed is for "chip package, method of forming a chip package and method of forming an electrical contact".

Company Profile
7.20.27
  • Engl; Reimund - Munich DE
  • Engl; Reimund - Regensburg DE
  • Engl; Reimund - Muenchen DE
  • Engl; Reimund - Muechen DE
  • Engl; Reimund - Regensberg DE
  • Engl; Reimund - Nurnberg DE
  • Engl; Reimund - Nuremberg DE
  • Engl, Reimund - Nuernberg DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of forming an electrical contact and method of forming a chip package with a metal contact structure and protective layer
Grant 10,978,418 - Mahler , et al. April 13, 2
2021-04-13
Chip Package, Method Of Forming A Chip Package And Method Of Forming An Electrical Contact
App 20210082861 - Mahler; Joachim ;   et al.
2021-03-18
Method for forming a chip package with compounds to improve the durability and performance of metal contact structures in the chip package
Grant 10,672,678 - Koerner , et al.
2020-06-02
Chip Package And Method Of Forming A Chip Package With A Metal Contact Structure And Protective Layer, And Method Of Forming An
App 20200013749 - Mahler; Joachim ;   et al.
2020-01-09
Chip package comprising a chemical compound and a method of forming a chip package comprising a chemical compound
Grant 10,497,634 - Koerner , et al. De
2019-12-03
Chip package and method of forming a chip package with a metal contact structure and protective layer, and method of forming an electrical contact
Grant 10,461,056 - Mahler , et al. Oc
2019-10-29
Methods For Forming A Chip Package
App 20190287875 - Koerner; Heinrich ;   et al.
2019-09-19
Chip package and method of forming a chip package
Grant 9,941,181 - Koerner , et al. April 10, 2
2018-04-10
Chip Package And Method Of Forming A Chip Package
App 20170338165 - KOERNER; Heinrich ;   et al.
2017-11-23
Chip Package, Method Of Forming A Chip Package And Method Of Forming An Electrical Contact
App 20170338169 - Mahler; Joachim ;   et al.
2017-11-23
Chip Package And Method Of Forming A Chip Package
App 20170338164 - Koerner; Heinrich ;   et al.
2017-11-23
Semiconductor Device
App 20150279782 - Ewe; Henrik ;   et al.
2015-10-01
Semiconductor device
Grant 9,059,083 - Ewe , et al. June 16, 2
2015-06-16
Protection Layers for Conductive Pads and Methods of Formation Thereof
App 20140319688 - Meinhold; Dirk ;   et al.
2014-10-30
Protection layers for conductive pads and methods of formation thereof
Grant 8,835,319 - Meinhold , et al. September 16, 2
2014-09-16
Semiconductor device
Grant 8,642,408 - Otremba , et al. February 4, 2
2014-02-04
Protection Layers for Conductive Pads and Methods of Formation Thereof
App 20130228929 - Meinhold; Dirk ;   et al.
2013-09-05
Integrated circuit device and method for the production thereof
Grant 8,330,252 - Mahler , et al. December 11, 2
2012-12-11
Semiconductor device including isolation layer
Grant 8,110,906 - Mahler , et al. February 7, 2
2012-02-07
Semiconductor Device
App 20110189821 - Otremba; Ralf ;   et al.
2011-08-04
Method for producing a power semiconductor module comprising surface-mountable flat external contacts
Grant 7,955,901 - Ewe , et al. June 7, 2
2011-06-07
Semiconductor device with a metallic carrier and two semiconductor chips applied to the carrier
Grant 7,868,465 - Otremba , et al. January 11, 2
2011-01-11
Semiconductor module
Grant 7,705,441 - Mahler , et al. April 27, 2
2010-04-27
Semiconductor device with leadframe including a diffusion barrier
Grant 7,675,146 - Engl , et al. March 9, 2
2010-03-09
Method For Producing A Power Semiconductor Module Comprising Surface-mountable Flat External Contacts
App 20090093090 - Ewe; Henrik ;   et al.
2009-04-09
Semiconductor Device
App 20090072379 - Ewe; Henrik ;   et al.
2009-03-19
Semiconductor Device With Leaderframe Including A Diffusion Barrier
App 20090065914 - Engl; Reimund ;   et al.
2009-03-12
Semiconductor Device
App 20080296782 - Otremba; Ralf ;   et al.
2008-12-04
Integrated Circuit Device And Method For The Production Thereof
App 20080246137 - Mahler; Joachim ;   et al.
2008-10-09
Semiconductor module
App 20080220564 - Mahler; Joachim ;   et al.
2008-09-11
Pentaarylcyclopentadienyl units as active units in resistive memory elements
Grant 7,417,247 - Schmid , et al. August 26, 2
2008-08-26
Semiconductor Arrangement Having a Resistive Memory
App 20080191197 - Walter; Andreas ;   et al.
2008-08-14
Semiconductor Device Including Isolation Layer
App 20080173992 - Mahler; Joachim ;   et al.
2008-07-24
Integrated Circuit Having Resistive Memory
App 20080142774 - Walter; Andreas ;   et al.
2008-06-19
Semiconductor Component Arrangement
App 20080061449 - Mahler; Joachim ;   et al.
2008-03-13
Semiconductor arrangement with non-volatile memories
App 20070194301 - Sezi; Recai ;   et al.
2007-08-23
Method for Forming Memory Layers
App 20070164276 - Engl; Reimund ;   et al.
2007-07-19
Memory cell, method for the production thereof and use of a composition therefor
Grant 7,238,964 - Walter , et al. July 3, 2
2007-07-03
Resistive memory for low-voltage applications
Grant 7,211,856 - Sezi , et al. May 1, 2
2007-05-01
Material and cell structure for storage applications
App 20060237716 - Sezi; Recai ;   et al.
2006-10-26
Pentaarylcyclopentadienyl units as active units in resistive memory elements
App 20050213413 - Schmid, Gunter ;   et al.
2005-09-29
Resistive memory for low-voltage applications
App 20050186737 - Sezi, Recai ;   et al.
2005-08-25
Memory cell, method for the production thereof and use of a composition therefor
App 20050179033 - Walter, Andreas ;   et al.
2005-08-18

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