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Signal processing with error correction
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Signal Processing With Error Correction
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Integrated circuit device and method for reading data from an SRAM memory
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Integrated circuit device and method for applying error correction to SRAM memory
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Method and apparatus for dynamically assigning master/slave roles within a distributed antenna diversity receiver apparatus
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Demodulation and decoding
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Method And Apparatus For Dynamically Assigning Master/slave Roles Within A Distributed Antenna Diversity Receiver Apparatus
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Demodulation And Decoding
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Signal processing circuits
Grant 9,893,920 - Engin , et al. February 13, 2 | 2018-02-13 |
Signal Processing Circuits
App 20170288927 - Engin; Nur ; et al. | 2017-10-05 |
Integrated circuit device and method for reducing SRAM leakage
Grant 9,778,983 - Engin , et al. October 3, 2 | 2017-10-03 |
Integrated Circuit Device And Method For Applying Error Correction To Sram Memory
App 20170039104 - Kapoor; Ajay ; et al. | 2017-02-09 |
Integrated Circuit Device And Method For Reducing Sram Leakage
App 20170039103 - Engin; Nur ; et al. | 2017-02-09 |
Integrated Circuit Device And Method For Reading Data From An Sram Memory
App 20170039102 - Engin; Nur ; et al. | 2017-02-09 |
Reduced memory iterative baseband processing
Grant 9,425,922 - Engin August 23, 2 | 2016-08-23 |
Reduced Memory Iterative Baseband Processing
App 20160050047 - Engin; Nur | 2016-02-18 |
Multi-standard viterbi processor
Grant 8,904,266 - Tang , et al. December 2, 2 | 2014-12-02 |
Reconfigurable interleaver having reconfigurable counters
Grant 8,874,858 - Engin October 28, 2 | 2014-10-28 |
Scalar/vector processor that includes a functional unit with a vector section and a scalar section
Grant 8,510,534 - Van Berkel , et al. August 13, 2 | 2013-08-13 |
N-way parallel turbo decoder architecture
Grant 8,438,434 - Engin May 7, 2 | 2013-05-07 |
Bitwise reliability indicators from survivor bits in Viterbi decoders
Grant 8,433,975 - Hekstra , et al. April 30, 2 | 2013-04-30 |
Multi-standard Viterbi Processor
App 20120042229 - Tang; Weihua ; et al. | 2012-02-16 |
Bitwise Reliability Indicators From Survivor Bits In Viterbi Decoders
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Reconfigurable Interleaver Having Reconfigurable Counters
App 20110307673 - Engin; Nur | 2011-12-15 |
N-way Parallel Turbo Decoder Architecture
App 20110161782 - Engin; Nur | 2011-06-30 |
Reconfigurable Turbo Interleavers For Multiple Standards
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Loop control circuit for a data processor
App 20060107028 - Meuwissen; Patrick Peter Elizabeth ; et al. | 2006-05-18 |
Scalar/vector processor
App 20050240644 - Van Berkel, Cornelis Hermanus ; et al. | 2005-10-27 |
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