loadpatents
name:-0.021767139434814
name:-0.02170205116272
name:-0.00050497055053711
Emesh; Ismail T. Patent Filings

Emesh; Ismail T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Emesh; Ismail T..The latest application filed is for "co or ni and cu integration for small and large features in integrated circuits".

Company Profile
0.20.18
  • Emesh; Ismail T. - Santa Clara CA
  • Emesh; Ismail T. - Sunnyvale CA
  • Emesh; Ismail T. - Gilbert AZ
  • Emesh; Ismail T. - Beaverton OR
  • Emesh; Ismail T. - Cumberland CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor reflow processing for feature fill
Grant 10,665,503 - Emesh
2020-05-26
Co or Ni and Cu integration for small and large features in integrated circuits
Grant 10,622,252 - Shaviv , et al.
2020-04-14
Methods for producing interconnects in semiconductor devices
Grant 10,062,607 - Emesh , et al. August 28, 2
2018-08-28
Co Or Ni And Cu Integration For Small And Large Features In Integrated Circuits
App 20180122696 - Shaviv; Roey ;   et al.
2018-05-03
Method for electrochemically depositing metal on a reactive metal film
Grant 9,840,788 - Shaviv , et al. December 12, 2
2017-12-12
Method for electrochemically depositing metal on a reactive metal film
Grant 9,828,687 - Shaviv , et al. November 28, 2
2017-11-28
Co or Ni and Cu integration for small and large features in integrated circuits
Grant 9,805,976 - Shaviv , et al. October 31, 2
2017-10-31
Systems and methods for electrochemical deposition on a workpiece including removing contamination from seed layer surface prior to ECD
Grant 9,768,060 - Shaviv , et al. September 19, 2
2017-09-19
Co Or Ni And Cu Integration For Small And Large Features In Integrated Circuits
App 20170200642 - Shaviv; Roey ;   et al.
2017-07-13
Methods For Producing Interconnects In Semiconductor Devices
App 20170047249 - Emesh; Ismail T. ;   et al.
2017-02-16
Methods for producing interconnects in semiconductor devices
Grant 9,425,092 - Emesh , et al. August 23, 2
2016-08-23
Systems And Methods For Electrochemical Deposition On A Workpiece Including Removing Contamination From Seed Layer Surface Prior To Ecd
App 20160126104 - Shaviv; Roey ;   et al.
2016-05-05
Systems And Methods For Removing Contamination From Seed Layer Surface
App 20160126134 - Shaviv; Roey ;   et al.
2016-05-05
Semiconductor reflow processing for high aspect ratio fill
Grant 9,245,798 - Emesh , et al. January 26, 2
2016-01-26
Method For Electrochemically Depositing Metal On A Reactive Metal Film
App 20150348837 - Shaviv; Roey ;   et al.
2015-12-03
Methods For Depositing Metal On A Reactive Metal Film
App 20150348836 - Shaviv; Roey ;   et al.
2015-12-03
Method For Electrochemically Depositing Metal On A Reactive Metal Film
App 20150348826 - Shaviv; Roey ;   et al.
2015-12-03
Method For Electrochemically Depositing Metal On A Reactive Metal Film
App 20150345045 - Shaviv; Roey ;   et al.
2015-12-03
Super Conformal Metal Plating From Complexed Electrolytes
App 20150325477 - Shaviv; Roey ;   et al.
2015-11-12
Super Conformal Plating
App 20150322587 - Pabelico; Chris ;   et al.
2015-11-12
Methods For Producing Interconnects In Semiconductor Devices
App 20140287577 - Emesh; Ismail T. ;   et al.
2014-09-25
Electrochemical Deposition On A Workpiece Having High Sheet Resistance
App 20140103534 - Emesh; Ismail T. ;   et al.
2014-04-17
Semiconductor Reflow Processing For Feature Fill
App 20140008812 - Emesh; Ismail T.
2014-01-09
Semiconductor Reflow Processing For High Aspect Ratio Fill
App 20130320505 - Emesh; Ismail T. ;   et al.
2013-12-05
Seed Layer Passivation
App 20130127057 - Schieffer; Callie A. ;   et al.
2013-05-23
Seed layer passivation
Grant 8,357,599 - Schieffer , et al. January 22, 2
2013-01-22
Seed Layer Passivation
App 20120205793 - Schieffer; Callie A. ;   et al.
2012-08-16
Method for planar electroplating
Grant 7,449,098 - Mayer , et al. November 11, 2
2008-11-11
Sol-gel precursor and method for formation of ferroelectric materials for integrated circuits
Grant 6,066,581 - Chivukula , et al. May 23, 2
2000-05-23
Method of adding on chip capacitors to an integrated circuit
Grant 5,789,303 - Leung , et al. August 4, 1
1998-08-04
Method of forming a crystalline ferroelectric dielectric material for an integrated circuit
Grant 5,728,603 - Emesh , et al. March 17, 1
1998-03-17
Capacitor for an integrated circuit and method of formation thereof, and a method of adding on-chip capacitors to an integrated circuit
Grant 5,563,762 - Leung , et al. October 8, 1
1996-10-08
Deposition of tungsten
Grant 5,407,698 - Emesh April 18, 1
1995-04-18
Formation of ruthenium oxide for integrated circuits
Grant 5,358,889 - Emesh , et al. October 25, 1
1994-10-25
Method for forming interconnect structures for integrated circuits
Grant 5,354,712 - Ho , et al. October 11, 1
1994-10-11
Method of making a capacitor for an integrated circuit
Grant 5,330,931 - Emesh , et al. July 19, 1
1994-07-19

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