Elkin; Ilyas
Patent Applications and Registrations
Patent applications and USPTO patent grants for Elkin; Ilyas.The latest application filed is for "full adder cell with improved power efficiency".
- Elkin; Ilyas - Sunnyvale CA
| Patent | Date |
|---|---|
| Full adder cell with improved power efficiency Grant 11,294,631 - Elkin , et al. April 5, 2 | 2022-04-05 |
| Full adder cell with improved power efficiency Grant 11,169,779 - Elkin , et al. November 9, 2 | 2021-11-09 |
| Full Adder Cell With Improved Power Efficiency App 20210124559 - Elkin; Ilyas ; et al. | 2021-04-29 |
| Full Adder Cell With Improved Power Efficiency App 20210124558 - Elkin; Ilyas ; et al. | 2021-04-29 |
| Low power flip-flop element with gated clock Grant 10,931,266 - Elkin , et al. February 23, 2 | 2021-02-23 |
| Radix-4 multiplier partial product generation with improved area and power Grant 10,466,968 - Elkin No | 2019-11-05 |
| Efficient scan latch systems and methods Grant 10,120,028 - Elkin , et al. November 6, 2 | 2018-11-06 |
| Efficient Scan Latch Systems And Methods App 20170234927 - Elkin; Ilyas ; et al. | 2017-08-17 |
| Latch and flip-flop circuits with shared clock-enabled supply nodes Grant 9,667,230 - Fojtik , et al. May 30, 2 | 2017-05-30 |
| Via resistance analysis systems and methods Grant 9,496,853 - Poppe , et al. November 15, 2 | 2016-11-15 |
| Determining on-chip voltage and temperature Grant 9,448,125 - Singh , et al. September 20, 2 | 2016-09-20 |
| Efficient scan latch systems and methods Grant 9,435,861 - Elkin , et al. September 6, 2 | 2016-09-06 |
| Low power master-slave flip-flop Grant 9,438,213 - Elkin , et al. September 6, 2 | 2016-09-06 |
| Coupling resistance and capacitance analysis systems and methods Grant 9,425,772 - Poppe , et al. August 23, 2 | 2016-08-23 |
| Low Power Flip-flop Element With Gated Clock App 20160043706 - ELKIN; Ilyas ; et al. | 2016-02-11 |
| Low Power Master-slave Flip-flop App 20150263708 - Elkin; Ilyas ; et al. | 2015-09-17 |
| Latch circuit with a bridging device Grant 9,077,329 - Elkin , et al. July 7, 2 | 2015-07-07 |
| Low power master-slave flip-flop Grant 9,071,233 - Elkin , et al. June 30, 2 | 2015-06-30 |
| System and method for examining asymetric operations Grant 8,952,705 - Elkin , et al. February 10, 2 | 2015-02-10 |
| Low Power Master-slave Flip-flop App 20150028927 - Elkin; Ilyas ; et al. | 2015-01-29 |
| Clock gating latch, method of operation thereof and integrated circuit employing the same Grant 8,890,573 - Elkin , et al. November 18, 2 | 2014-11-18 |
| Latch Circuit With A Bridging Device App 20140125393 - Elkin; Ilyas ; et al. | 2014-05-08 |
| Efficient Scan Latch Systems And Methods App 20140122949 - Elkin; Ilyas ; et al. | 2014-05-01 |
| Clock Gating Latch, Method Of Operation Thereof And Integrated Circuit Employing The Same App 20140070847 - Elkin; Ilyas ; et al. | 2014-03-13 |
| Latch circuit with a bridging device Grant 8,659,337 - Elkin , et al. February 25, 2 | 2014-02-25 |
| System And Method For Examining Leakage Impacts App 20130106524 - Elkin; Ilyas ; et al. | 2013-05-02 |
| System And Method For Examining Asymetric Operations App 20130106438 - Elkin; Ilyas ; et al. | 2013-05-02 |
| Determining On-chip Voltage And Temperature App 20130110437 - Singh; Abhishek ; et al. | 2013-05-02 |
| Coupling Resistance And Capacitance Analysis Systems And Methods App 20130027140 - Poppe; Wojciech Jakub ; et al. | 2013-01-31 |
| Via Resistance Analysis Systems And Methods App 20130021107 - Poppe; Wojciech Jakub ; et al. | 2013-01-24 |
| Latch Circuit With A Bridging Device App 20130021078 - ELKIN; Ilyas ; et al. | 2013-01-24 |
| Active echo on-die repeater circuit Grant 8,035,425 - Masleid , et al. October 11, 2 | 2011-10-11 |
| Method and apparatus for test of asynchronous pipelines Grant 7,890,826 - Parulkar , et al. February 15, 2 | 2011-02-15 |
| Active Echo On-die Repeater Circuit App 20100164557 - Masleid; Robert P. ; et al. | 2010-07-01 |
| Low-power semi-dynamic flip-flop with smart keeper Grant 7,629,815 - Tang , et al. December 8, 2 | 2009-12-08 |
| Method and apparatus for test of asynchronous pipelines App 20080141088 - Parulkar; Ishwardutt ; et al. | 2008-06-12 |
| One gate delay output noise insensitive latch Grant 7,164,302 - Elkin January 16, 2 | 2007-01-16 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 