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name:-0.012523174285889
name:-0.0078299045562744
name:-0.014604091644287
Eldridge; Schuyler Patent Filings

Eldridge; Schuyler

Patent Applications and Registrations

Patent applications and USPTO patent grants for Eldridge; Schuyler.The latest application filed is for "determination and correction of physical circuit event related errors of a hardware design".

Company Profile
12.8.11
  • Eldridge; Schuyler - Ossining NY
  • Eldridge; Schuyler - YORKTOWN HEIGHTS NY
  • Eldridge; Schuyler - Brookline MA US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Determination And Correction Of Physical Circuit Event Related Errors Of A Hardware Design
App 20210270897 - Bose; Pradip ;   et al.
2021-09-02
Self-evaluating array of memory
Grant 11,037,650 - Buyuktosunoglu , et al. June 15, 2
2021-06-15
Low-overhead error prediction and preemption in deep neural network using apriori network statistics
Grant 11,016,840 - Venkataramani , et al. May 25, 2
2021-05-25
Determination and correction of physical circuit event related errors of a hardware design
Grant 11,002,791 - Bose , et al. May 11, 2
2021-05-11
Determination And Correction Of Physical Circuit Event Related Errors Of A Hardware Design
App 20200300913 - Bose; Pradip ;   et al.
2020-09-24
Low-overhead Error Prediction And Preemption In Deep Neural Network Using Apriori Network Statistics
App 20200241954 - Venkataramani; Swagath ;   et al.
2020-07-30
Determination and correction of physical circuit event related errors of a hardware design
Grant 10,690,723 - Bose , et al.
2020-06-23
Self-evaluating Array Of Memory
App 20200168290 - Buyuktosunoglu; Alper ;   et al.
2020-05-28
Determination And Correction Of Physical Circuit Event Related Errors Of A Hardware Design
App 20200158782 - Bose; Pradip ;   et al.
2020-05-21
Self-evaluating array of memory
Grant 10,607,715 - Buyuktosunoglu , et al.
2020-03-31
Determination and correction of physical circuit event related errors of a hardware design
Grant 10,365,327 - Bose , et al. July 30, 2
2019-07-30
System And Method For Consensus-based Representation And Error Checking For Neural Networks
App 20190164048 - Bose; Pradip ;   et al.
2019-05-30
Reducing The Cost Of N Modular Redundancy For Neural Networks
App 20190138903 - Bose; Pradip ;   et al.
2019-05-09
Determination And Correction Of Physical Circuit Event Related Errors Of A Hardware Design
App 20190113572 - Bose; Pradip ;   et al.
2019-04-18
Self-evaluating Array Of Memory
App 20180358110 - Buyuktosunoglu; Alper ;   et al.
2018-12-13
Digest generation
Grant 9,292,548 - Gopal , et al. March 22, 2
2016-03-22
Digest Generation
App 20130290285 - Gopal; Vinodh ;   et al.
2013-10-31

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