Elbrus International

Patent Applications and Registrations

Patent applications and USPTO patent grants for Elbrus International.The latest application filed is for "single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution".

Company Profile

0.9.6

Elbrus International - Moscow RU
Elbrus International - Grand Cayman unknown UNKNOWN
Elbrus International - George Town KY
Elbrus International - George Town Grand Cayman KY
Elbrus International - 14, Bolshoi Savvinski per Moscow RU

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution Grant 8,261,250 - Babaian , et al. September 4, 2	2012-09-04
Single-chip Multiprocessor With Clock Cycle-precise Program Scheduling Of Parallel Execution App 20110107067 - Babaian; Boris A. ; et al.	2011-05-05
Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution Grant 7,895,587 - Babaian , et al. February 22, 2	2011-02-22
Single-chip multiprocessor with clock cycle-precise program scheduling of parallel execution App 20070006193 - Babaian; Boris A. ; et al.	2007-01-04
Single-chip multiprocessor with cycle-precise program scheduling of parallel execution Grant 7,143,401 - Babaian , et al. November 28, 2	2006-11-28
Method of using a plurality of virtual memory spaces for providing efficient binary compatibility between a plurality of source architectures and a single target architecture Grant 7,069,412 - Babaian , et al. June 27, 2	2006-06-27
Method and apparatus for preserving precise exceptions in binary translated code Grant 7,065,750 - Babaian , et al. June 20, 2	2006-06-20
Method for prioritizing operations within a pipelined microprocessor based upon required results Grant 7,003,650 - Babaian , et al. February 21, 2	2006-02-21
Hardware supported software pipelined loop prologue optimization Grant 6,954,927 - Ostanevich October 11, 2	2005-10-11
Method for fast execution of translated binary code utilizing database cache for low-level code correspondence Grant 6,820,255 - Babaian , et al. November 16, 2	2004-11-16
Method for emulating hardware features of a foreign architecture in a host operating system environment Grant 6,732,220 - Babaian , et al. May 4, 2	2004-05-04
Method of using a plurality of virtual memory spaces for providing efficient binary compatibility between a plurality of source architectures and a single target architecture App 20040024953 - Babaian, Boris A. ; et al.	2004-02-05
Hardware supported software pipelined loop prologue optimization App 20020133813 - Ostanevich, Alexander Y.	2002-09-19
List scheduling algorithm for a cycle-driven instruction scheduler App 20020083423 - Ostanevich, Alexander Y. ; et al.	2002-06-27
Constant bit folding and propagation App 20020038452 - Kasinsky, Alexander I.	2002-03-28

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