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Microprocessor including an efficiency logic unit
Grant 11,379,228 - Ayzenfeld , et al. July 5, 2 | 2022-07-05 |
Microprocessor Including An Efficiency Logic Unit
App 20200089493 - Ayzenfeld; Avraham ; et al. | 2020-03-19 |
Structure for microprocessor including arithmetic logic units and an efficiency logic unit
Grant 10,514,911 - Ayzenfeld , et al. Dec | 2019-12-24 |
Generating design structure for microprocessor with arithmetic logic units and an efficiency logic unit
Grant 10,503,503 - Ayzenfeld , et al. Dec | 2019-12-10 |
Dynamic issue masks for processor hang prevention
Grant 10,108,426 - Alexander , et al. October 23, 2 | 2018-10-23 |
Dynamic issue masks for processor hang prevention
Grant 10,102,002 - Alexander , et al. October 16, 2 | 2018-10-16 |
Instruction stream tracing of multi-threaded processors
Grant 9,996,354 - Eisen , et al. June 12, 2 | 2018-06-12 |
Register file mapping
Grant 9,880,847 - Alexander , et al. January 30, 2 | 2018-01-30 |
Instruction stream tracing of multi-threaded processors
Grant 9,594,561 - Eisen , et al. March 14, 2 | 2017-03-14 |
Register File Mapping
App 20160378489 - Alexander; Gregory W. ; et al. | 2016-12-29 |
Instruction Stream Tracing Of Multi-threaded Processors
App 20160203073 - Eisen; Lee E. ; et al. | 2016-07-14 |
Instruction Stream Tracing Of Multi-threaded Processors
App 20160202993 - Eisen; Lee E. ; et al. | 2016-07-14 |
Design Structure For Microprocessor Arithmetic Logic Units
App 20160147531 - Ayzenfeld; Avraham ; et al. | 2016-05-26 |
Structure For Microprocessor Arithmetic Logic Units
App 20160147530 - Ayzenfeld; Avraham ; et al. | 2016-05-26 |
Dynamic Issue Masks For Processor Hang Prevention
App 20160092212 - ALEXANDER; GREGORY W. ; et al. | 2016-03-31 |
Dynamic Issue Masks For Processor Hang Prevention
App 20160092233 - ALEXANDER; GREGORY W. ; et al. | 2016-03-31 |
Reducing power grid noise in a processor while minimizing performance loss
Grant 9,146,772 - Eisen , et al. September 29, 2 | 2015-09-29 |
Reducing power grid noise in a processor while minimizing performance loss
Grant 9,141,421 - Eisen , et al. September 22, 2 | 2015-09-22 |
Reducing Power Grid Noise In A Processor While Minimizing Performance Loss
App 20140157033 - Eisen; Lee E. ; et al. | 2014-06-05 |
Reducing Power Grid Noise In A Processor While Minimizing Performance Loss
App 20140157277 - Eisen; Lee E. ; et al. | 2014-06-05 |
Intermediate register mapper
Grant 8,683,180 - Barrick , et al. March 25, 2 | 2014-03-25 |
Intermediate Register Mapper
App 20110087865 - Barrick; Brian D. ; et al. | 2011-04-14 |
Dual-issuance of microprocessor instructions using dual dependency matrices
Grant 7,769,984 - Alexander , et al. August 3, 2 | 2010-08-03 |
Dual-issuance Of Microprocessor Instructions Using Dual Dependency Matrices
App 20100064121 - Alexander; Gregory W. ; et al. | 2010-03-11 |
Error detection enhancement in a microprocessor through the use of a second dependency matrix
Grant 7,549,095 - Alexander , et al. June 16, 2 | 2009-06-16 |
Adaptive Fetch Gating In Multithreaded Processors, Fetch Control And Method Of Controlling Fetches
App 20080229068 - BOSE; PRADIP ; et al. | 2008-09-18 |
Adaptive fetch gating in multithreaded processors, fetch control and method of controlling fetches
Grant 7,392,366 - Bose , et al. June 24, 2 | 2008-06-24 |
Adaptive Fetch Gating In Multithreaded Processors, Fetch Control And Method Of Controlling Fetches
App 20080133886 - BOSE; PRADIP ; et al. | 2008-06-05 |
Adaptive fetch gating in multithreaded processors, fetch control and method of controlling fetches
App 20060101238 - Bose; Pradip ; et al. | 2006-05-11 |
Load-store unit and method of loading and storing single-precision floating-point registers in a double-precision architecture
Grant 5,805,475 - Putrino , et al. September 8, 1 | 1998-09-08 |
Method and system for recoding noneffective instructions within a data processing system
Grant 5,619,408 - Black , et al. April 8, 1 | 1997-04-08 |
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