| Patent | Date |
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Address/command chip synchronized autonomous data chip address sequencer for a distributed buffer memory system
Grant 11,379,123 - Carlough , et al. July 5, 2 | 2022-07-05 |
Reducing latency of memory read operations returning data on a read data path across multiple clock boundaries, to a host implementing a high speed serial interface
Grant 11,099,601 - Carlough , et al. August 24, 2 | 2021-08-24 |
Address/command Chip Synchronized Autonomous Data Chip Address Sequencer For A Distributed Buffer Memory System
App 20210191630 - Carlough; Steven R. ; et al. | 2021-06-24 |
Address/command chip synchronized autonomous data chip address sequencer for a distributed buffer memory system
Grant 10,976,939 - Carlough , et al. April 13, 2 | 2021-04-13 |
Reducing chip latency at a clock boundary by reference clock phase adjustment
Grant 10,771,068 - Carlough , et al. Sep | 2020-09-08 |
Host controlled data chip address sequencing for a distributed memory buffer system
Grant 10,747,442 - Carlough , et al. A | 2020-08-18 |
Interface scheduler for a distributed memory system
Grant 10,740,031 - Zheng , et al. A | 2020-08-11 |
Reducing latency of memory read operations returning data on a read data path across multiple clock boundaries, to a host implementing a high speed serial interface
Grant 10,698,440 - Carlough , et al. | 2020-06-30 |
Register access in a distributed memory buffer system
Grant 10,642,535 - Carlough , et al. | 2020-05-05 |
Interface Scheduler For A Distributed Memory System
App 20200097214 - Zheng; Jie ; et al. | 2020-03-26 |
Host Synchronized Autonomous Data Chip Address Sequencer For A Distributed Buffer Memory System
App 20200073565 - Carlough; Steven R. ; et al. | 2020-03-05 |
Address/command Chip Synchronized Autonomous Data Chip Address Sequencer For A Distributed Buffer Memory System
App 20200042205 - Carlough; Steven R. ; et al. | 2020-02-06 |
Host synchronized autonomous data chip address sequencer for a distributed buffer memory system
Grant 10,534,555 - Carlough , et al. Ja | 2020-01-14 |
Reducing Latency Of Memory Read Operations Returning Data On A Read Data Path Across Multiple Clock Boundaries, To A Host Implem
App 20190384352 - Carlough; Steven R. ; et al. | 2019-12-19 |
Address/command chip synchronized autonomous data chip address sequencer for a distributed buffer memory system
Grant 10,489,069 - Carlough , et al. Nov | 2019-11-26 |
Address/command chip controlled data chip address sequencing for a distributed memory buffer system
Grant 10,395,698 - Carlough , et al. A | 2019-08-27 |
JTAG support over a broadcast bus in a distributed memory buffer system
Grant 10,393,805 - Friedman , et al. A | 2019-08-27 |
Reducing Chip Latency At A Clock Boundary By Reference Clock Phase Adjustment
App 20190260380 - Carlough; Steven R. ; et al. | 2019-08-22 |
Address/Command Chip Controlled Data Chip Address Sequencing for a Distributed Memory Buffer System
App 20190252010 - Carlough; Steven R. ; et al. | 2019-08-15 |
Register Access in a Distributed Memory Buffer System
App 20190227741 - Carlough; Steven R. ; et al. | 2019-07-25 |
Partial data replay in a distributed memory buffer system
Grant 10,353,606 - Eickhoff , et al. July 16, 2 | 2019-07-16 |
Reducing Latency Of Memory Read Operations Returning Data On A Read Data Path Across Multiple Clock Boundaries, To A Host Implem
App 20190212769 - Carlough; Steven R. ; et al. | 2019-07-11 |
Jtag Support Over A Broadcast Bus In A Distributed Memory Buffer System
App 20190170819 - Friedman; Logan I. ; et al. | 2019-06-06 |
Address/Command Chip Synchronized Autonomous Data Chip Address Sequencer for A Distributed Buffer Memory System
App 20190163378 - Carlough; Steven R. ; et al. | 2019-05-30 |
Host Controlled Data Chip Address Sequencing for a Distributed Memory Buffer System
App 20190163362 - Carlough; Steven R. ; et al. | 2019-05-30 |
Host Synchronized Autonomous Data Chip Address Sequencer for A Distributed Buffer Memory System
App 20190163384 - Carlough; Steven R. ; et al. | 2019-05-30 |
Address/Command Chip Controlled Data Chip Address Sequencing for A Distributed Memory Buffer System
App 20190163383 - Carlough; Steven R. ; et al. | 2019-05-30 |
Partial Data Replay In A Distributed Memory Buffer System
App 20190114091 - Eickhoff; Susan M. ; et al. | 2019-04-18 |
Double data rate (DDR) memory read latency reduction
Grant 10,162,773 - Carlough , et al. Dec | 2018-12-25 |
Partial data replay in a distributed memory buffer system
Grant 10,078,461 - Eickhoff , et al. September 18, 2 | 2018-09-18 |
Parallel data communications mechanism having reduced power continuously calibrated lines
Grant 8,898,504 - Baumgartner , et al. November 25, 2 | 2014-11-25 |
Communicating Control Information for a Data Communications Link Via a Line Being Calibrated
App 20130188656 - Ferraiolo; Frank D. ; et al. | 2013-07-25 |
Parallel Data Communications Mechanism Having Reduced Power Continuously Calibrated Lines
App 20130159761 - Baumgartner; Steven J. ; et al. | 2013-06-20 |
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