loadpatents
name:-0.031399011611938
name:-0.029446125030518
name:-0.003849983215332
Ehrenreich; Sebastian Patent Filings

Ehrenreich; Sebastian

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ehrenreich; Sebastian.The latest application filed is for "on-die voltage regulation using p-fet header devices with a feedback control loop".

Company Profile
0.20.19
  • Ehrenreich; Sebastian - Boeblingen N/A DE
  • Ehrenreich; Sebastian - Schoenau DE
  • Ehrenreich; Sebastian - Dresden DE
  • Ehrenreich; Sebastian - US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Signal repowering chip for 3-dimensional integrated circuit
Grant 8,513,663 - Buehler , et al. August 20, 2
2013-08-20
On-die voltage regulation using p-FET header devices with a feedback control loop
Grant 8,476,966 - Buechner , et al. July 2, 2
2013-07-02
Method, system, computer program product, and data processing device for monitoring memory circuits and corresponding integrated circuit
Grant 8,363,487 - Ehrenreich , et al. January 29, 2
2013-01-29
On-Die Voltage Regulation Using p-FET Header Devices with a Feedback Control Loop
App 20120081176 - Buechner; Thomas ;   et al.
2012-04-05
Wordline booster design structure and method of operating a wordine booster circuit
Grant 7,921,388 - Ehrenreich , et al. April 5, 2
2011-04-05
Method, System, Computer Program Product, And Data Processing Device For Monitoring Memory Circuits And Corresponding Integrated Circuit
App 20100309734 - Ehrenreich; Sebastian ;   et al.
2010-12-09
Single-ended read and differential write scheme
Grant 7,813,163 - Pille , et al. October 12, 2
2010-10-12
Method to reduce leakage of a SRAM-array
Grant 7,808,856 - Ehrenreich , et al. October 5, 2
2010-10-05
Signal Repowering Chip For 3-Dimensional Integrated Circuit
App 20100237700 - Buehler; Markus ;   et al.
2010-09-23
Redundancy in signal distribution trees
Grant 7,755,408 - Ehrenreich , et al. July 13, 2
2010-07-13
Design structure for improving performance of SRAM cells, SRAM cell, SRAM array, and write circuit
Grant 7,675,794 - Behrends , et al. March 9, 2
2010-03-09
Wordline booster circuit and method of operating a wordline booster circuit
Grant 7,636,254 - Ehrenreich , et al. December 22, 2
2009-12-22
Method to improve performance of SRAM cells, SRAM cell, SRAM array, and write circuit
Grant 7,626,851 - Behrends , et al. December 1, 2
2009-12-01
Method To Reduce Leakage Of A Sram-array
App 20090285046 - Ehrenreich; Sebastian ;   et al.
2009-11-19
Storage cell design evaluation circuit including a wordline timing and cell access detection circuit
Grant 7,564,739 - Ehrenreich , et al. July 21, 2
2009-07-21
Bypass circuit for memory arrays
Grant 7,558,138 - Ehrenreich , et al. July 7, 2
2009-07-07
Design Structure For Improving Performance Of Sram Cells, Sram Cell, Sram Array, And Write Circuit
App 20090154263 - Behrends; Derick G. ;   et al.
2009-06-18
Asymmetrical random access memory cell, and a memory comprising asymmetrical memory cells
Grant 7,535,750 - Wagner , et al. May 19, 2
2009-05-19
Automatic power level control circuit for a transceiver device
Grant 7,532,869 - Ehrenreich , et al. May 12, 2
2009-05-12
Single-ended read and differential write scheme
App 20090059688 - Pille; Juergen ;   et al.
2009-03-05
Storage Cell Design Evaluation Circuit Including A Wordline Timing And Cell Access Detection Circuit
App 20080273403 - Ehrenreich; Sebastian ;   et al.
2008-11-06
Redundancy in Signal Distribution Trees
App 20080256413 - Ehrenreich; Sebastian ;   et al.
2008-10-16
Method for evaluating storage cell design using a wordline timing and cell access detection circuit
Grant 7,414,904 - Ehrenreich , et al. August 19, 2
2008-08-19
Comparator Circuit and Method for Operating a Comparator Circuit
App 20080178129 - Ehrenreich; Sebastian
2008-07-24
Storage Cell Design Evaluation Circuit Including a Wordline Timing and Cell Access Detection Circuit
App 20080137455 - Ehrenreich; Sebastian ;   et al.
2008-06-12
Method To Improve Performance Of Sram Cells, Sram Cell, Sram Array, And Write Circuit
App 20080123442 - Behrends; Derick G. ;   et al.
2008-05-29
Wordline Booster Design Structure and Method of Operating a Wordline Booster Circuit
App 20080068902 - Ehrenreich; Sebastian ;   et al.
2008-03-20
Wordline Booster Circuit and Method of Operating a Wordline Booster Circuit
App 20080068901 - Ehrenreich; Sebastian ;   et al.
2008-03-20
Comparator Circuit and Method for Operating a Comparator Circuit
App 20080048729 - Ehrenreich; Sebastian
2008-02-28
Redundancy in signal distribution trees
Grant 7,336,115 - Ehrenreich , et al. February 26, 2
2008-02-26
Asymmetrical Random Access Memory Cell, A Memory Comprising Asymmetrical Memory Cells And A Method To Operate Such A Memory
App 20070165447 - Wagner; Otto ;   et al.
2007-07-19
Circuit Arrangement and Method to Reduce Leakage Power and to Increase the Performance of a Circuit
App 20070165343 - Barowski; Harry ;   et al.
2007-07-19
Redundancy in signal distribution trees
App 20060179396 - Ehrenreich; Sebastian ;   et al.
2006-08-10
Integrated RF signal level detector usable for automatic power level control
Grant 6,937,847 - Ehrenreich , et al. August 30, 2
2005-08-30
Integrated RF signal level detector usable for automatic power level control
App 20040198262 - Ehrenreich, Sebastian ;   et al.
2004-10-07
Automatic power level control circuit for a transceiver device
App 20040198272 - Ehrenreich, Sebastian ;   et al.
2004-10-07

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