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Processor condition sensing circuits, systems and methods
App 20060059387 - Swoboda; Gary L. ; et al. | 2006-03-16 |
Program counter trace stack, access port, and serial scan path
Grant 6,996,747 - Swoboda , et al. February 7, 2 | 2006-02-07 |
Repeat block with zero cycle overhead nesting
Grant 6,986,028 - Ehlig , et al. January 10, 2 | 2006-01-10 |
Microphone/speaker system with context switching in processor
Grant 6,986,142 - Ehlig , et al. January 10, 2 | 2006-01-10 |
Context switching devices, systems and methods
App 20050278512 - Ehlig, Peter N. ; et al. | 2005-12-15 |
Devices, systems and methods for conditional instructions
App 20050251638 - Boutaud, Frederic ; et al. | 2005-11-10 |
IC with wait state registers
Grant 6,918,025 - Boutaud , et al. July 12, 2 | 2005-07-12 |
Volatile memory cell reconfigured as a non-volatile memory cell
Grant 6,768,669 - Schmidt , et al. July 27, 2 | 2004-07-27 |
Volatile memory cell reconfigured as a non-volatile memory cell
App 20040052103 - Schmidt, James T. ; et al. | 2004-03-18 |
Devices, systems and methods for conditional instructions notice
App 20030226002 - Boutaud, Frederic ; et al. | 2003-12-04 |
Repeat block with zero cycle overhead nesting
App 20030200423 - Ehlig, Peter N. ; et al. | 2003-10-23 |
Processor condition sensing circuits, systems and methods
App 20030196144 - Swoboda, Gary L. ; et al. | 2003-10-16 |
Processor condition sensing circuits, systems and methods
Grant 6,546,505 - Swoboda , et al. April 8, 2 | 2003-04-08 |
Apparatus And Method For Code-enhanced Performance In A Digital Signal Processing Unit
App 20020112144 - TESSAROLO, ALEXANDER ; et al. | 2002-08-15 |
DSP with wait state registers having at least two portions
Grant 6,334,181 - Boutaud , et al. December 25, 2 | 2001-12-25 |
Data processing device with mask and status bits for selecting a set of status conditions
Grant 6,253,307 - Boutaud , et al. June 26, 2 | 2001-06-26 |
System with wait state registers
Grant 6,240,505 - Boutaud , et al. May 29, 2 | 2001-05-29 |
Data processing device and method of operation with context switching
Grant 6,134,578 - Ehlig , et al. October 17, 2 | 2000-10-17 |
Processor condition sensing circuits, systems and methods
Grant 6,032,268 - Swoboda , et al. February 29, 2 | 2000-02-29 |
Devices, systems and methods for conditional instructions
Grant 5,946,483 - Boutaud , et al. August 31, 1 | 1999-08-31 |
Method for pipelined data processing with conditioning instructions for controlling execution of instructions without pipeline flushing
Grant 5,907,714 - Boutaud , et al. May 25, 1 | 1999-05-25 |
Devices and systems with parallel logic unit operable on data memory locations
Grant 5,829,054 - Ehlig , et al. October 27, 1 | 1998-10-27 |
Devices and systems with conditional instructions
Grant 5,652,910 - Boutaud , et al. July 29, 1 | 1997-07-29 |
Devices, systems and methods for conditional instructions
Grant 5,617,574 - Boutaud , et al. April 1, 1 | 1997-04-01 |
Devices and systems with parallel logic unit operable on data memory locations, and methods
Grant 5,586,275 - Ehlig , et al. December 17, 1 | 1996-12-17 |
Devices and systems with parallel logic unit, and methods notice
Grant 5,583,767 - Ehlig , et al. December 10, 1 | 1996-12-10 |
Devices and systems with parallel logic unit, and methods
Grant 5,579,218 - Ehlig , et al. November 26, 1 | 1996-11-26 |
Devices and systems with parallel logic unit, and methods
Grant 5,579,497 - Ehlig , et al. November 26, 1 | 1996-11-26 |
System and method using synchronized processors to perform real time internal monitoring of a data processing device
Grant 5,551,050 - Ehlig , et al. August 27, 1 | 1996-08-27 |
Data processor with sets of two registers where both registers receive identical information and when context changes in one register the other register remains unchanged
Grant 5,550,993 - Ehlig , et al. August 27, 1 | 1996-08-27 |
Processor condition sensing circuits, systems and methods
Grant 5,535,331 - Swoboda , et al. July 9, 1 | 1996-07-09 |
Electromechanical apparatus having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context
Grant 5,319,789 - Ehlig , et al. June 7, 1 | 1994-06-07 |
Modem having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context
Grant 5,319,792 - Ehlig , et al. June 7, 1 | 1994-06-07 |
Signal processing apparatus having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context
Grant 5,313,648 - Ehlig , et al. May 17, 1 | 1994-05-17 |
Devices and method for generating and using systems, software waitstates on address boundaries in data processing
Grant 5,155,812 - Ehlig , et al. October 13, 1 | 1992-10-13 |
Context switching devices, systems and methods
Grant 5,142,677 - Ehlig , et al. August 25, 1 | 1992-08-25 |
Passive processor communications interface
Grant 5,109,494 - Ehlig , et al. April 28, 1 | 1992-04-28 |
Pin selectable multi-mode processor
Grant 5,101,498 - Ehlig , et al. March 31, 1 | 1992-03-31 |
Series maxium/minimum function computing devices, systems and methods
Grant 5,072,418 - Boutaud , et al. December 10, 1 | 1991-12-10 |
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