Edwards; Gareth D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Edwards; Gareth D..The latest application filed is for "method and implementation of cyclic redundancy check for wide databus".

Company Profile

0.16.0

Edwards; Gareth D. - Edinburgh GB

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and implementation of cyclic redundancy check for wide databus Grant 8,539,326 - Nethercot , et al. September 17, 2	2013-09-17
One-pass method for implementing a flexible testbench Grant 8,271,915 - Edwards September 18, 2	2012-09-18
Method of automating clock signal provisioning within an integrated circuit Grant 8,032,852 - Sinclair , et al. October 4, 2	2011-10-04
Method of enabling the generation of reset signals in an integrated circuit Grant 8,015,530 - Sinclair , et al. September 6, 2	2011-09-06
Network media access controller embedded in a programmable device--receive-side client interface Grant 7,991,937 - Yin , et al. August 2, 2	2011-08-02
Embedded network media access controller Grant 7,934,038 - Kao , et al. April 26, 2	2011-04-26
Method and apparatus for protection of time-limited operation of a circuit Grant 7,814,336 - Nisbet , et al. October 12, 2	2010-10-12
Network media access controller embedded in an integrated circuit host interface Grant 7,761,643 - Yin , et al. July 20, 2	2010-07-20
One-pass method for implementing a flexible testbench Grant 7,526,742 - Edwards April 28, 2	2009-04-28
Network media access controller embedded in a programmable logic device--transmit-side client interface Grant 7,493,511 - Yin , et al. February 17, 2	2009-02-17
Network media access controller embedded in a programmable logic device--host interface Grant 7,484,022 - Yin , et al. January 27, 2	2009-01-27
Network media access controller embedded in a programmable logic device--receive-side client interface Grant 7,461,193 - Yin , et al. December 2, 2	2008-12-02
Network media access controller embedded in a programmable logic device--statistics interface Grant 7,366,807 - Yin , et al. April 29, 2	2008-04-29
Network media access controller embedded in a programmable logic device--physical layer interface Grant 7,330,924 - Kao , et al. February 12, 2	2008-02-12
Scheme for eliminating the effects of duty cycle asymmetry in clock-forwarded double data rate interface applications Grant 7,290,201 - Edwards October 30, 2	2007-10-30

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