Edirisooriya; Geetani R.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Edirisooriya; Geetani R..The latest application filed is for "presentation of direct accessed storage under a logical drive model".

Company Profile

4.11.12

Edirisooriya; Geetani R. - Tempe AZ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Presentation of direct accessed storage under a logical drive model Grant 11,449,446 - Slaight , et al. September 20, 2	2022-09-20
Hardware-based virtual machine communication supporting direct memory access data transfer Grant 10,990,546 - Edirisooriya , et al. April 27, 2	2021-04-27
Presentation Of Direct Accessed Storage Under A Logical Drive Model App 20200349100 - Slaight; Thomas M. ; et al.	2020-11-05
Hardware-based Virtual Machine Communication App 20190179786 - Edirisooriya; Samantha J. ; et al.	2019-06-13
Hardware-based virtual machine communication Grant 10,241,947 - Edirisooriya , et al.	2019-03-26
Invalidating reads for cache utilization in processors Grant 10,235,302 - Edirisooriya , et al.	2019-03-19
Hardware-based Virtual Machine Communication App 20180225237 - Edirisooriya; Samantha J. ; et al.	2018-08-09
Invalidating Reads For Cache Utilization In Processors App 20180165222 - EDIRISOORIYA; SAMANTHA J. ; et al.	2018-06-14
Sideband parity handling Grant 9,602,237 - Adler , et al. March 21, 2	2017-03-21
Presentation Of Direct Accessed Storage Under A Logical Drive Model App 20160335208 - Slaight; Thomas M. ; et al.	2016-11-17
Presentation of direct accessed storage under a logical drive model Grant 9,417,821 - Slaight , et al. August 16, 2	2016-08-16
Sideband Parity Handling App 20160182186 - Adler; Robert P. ; et al.	2016-06-23
Presentation Of Direct Accessed Storage Under A Logical Drive Model App 20140189212 - Slaight; Thomas M. ; et al.	2014-07-03
Method, system, and apparatus to decrease CPU temperature through I/O bus throttling Grant 7,596,638 - Lee , et al. September 29, 2	2009-09-29
Index/data register pair for indirect register access Grant 7,376,782 - Balraj , et al. May 20, 2	2008-05-20
Apparatus and method for maintaining data integrity following parity error detection Grant 7,251,755 - Joshi , et al. July 31, 2	2007-07-31
Method and apparatus for managing buffers in PCI bridges Grant 7,213,094 - Edirisooriya , et al. May 1, 2	2007-05-01
Index/data register pair for indirect register access App 20070005869 - Balraj; Jasper ; et al.	2007-01-04
Method, system, and apparatus to decrease CPU temperature through I/O bus throttling App 20050283561 - Lee, John P. ; et al.	2005-12-22
Apparatus and method for maintaining data integrity following parity error detection App 20050193288 - Joshi, Aniruddha P. ; et al.	2005-09-01
Method and apparatus for supporting multi-function PCI devices in PCI bridges App 20050182886 - Edirisooriya, Geetani R. ; et al.	2005-08-18

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