| Patent | Date |
|---|
System for multisized bus coupling in a packet-switched computer system
App 20020194418 - Nishtala, Satyanarayana ; et al. | 2002-12-19 |
System for context-dependent name resolution
Grant 6,154,777 - Ebrahim November 28, 2 | 2000-11-28 |
System for multisized bus coupling in a packet-switched computer system
Grant 6,101,565 - Nishtala , et al. August 8, 2 | 2000-08-08 |
Method and apparatus for implementing hardware protection domains in a system with no memory management unit (MMU)
Grant 5,987,557 - Ebrahim November 16, 1 | 1999-11-16 |
Linking related data in a document set including a plurality of books written by different groups of authors in a computer network
Grant 5,970,505 - Ebrahim October 19, 1 | 1999-10-19 |
Apparatus and method for fast filtering read and write barrier operations in garbage collection system
Grant 5,930,807 - Ebrahim , et al. July 27, 1 | 1999-07-27 |
Method and apparatus for flow control in packet-switched computer system
Grant 5,907,485 - Van Loo , et al. May 25, 1 | 1999-05-25 |
Transaction activation processor for controlling memory transaction processing in a packet switched cache coherent multiprocessor system
Grant 5,905,998 - Ebrahim , et al. May 18, 1 | 1999-05-18 |
System and method for parallel execution of memory transactions using multiple memory models, including SSO, TSO, PSO and RMO
Grant 5,893,165 - Ebrahim April 6, 1 | 1999-04-06 |
System and method for swapping blocks of tagged stack entries between a tagged stack cache and an untagged main memory storage
Grant 5,893,121 - Ebrahim , et al. April 6, 1 | 1999-04-06 |
Method and apparatus for interrupt communication in packet-switched microprocessor-based computer system
Grant 5,892,957 - Normoyle , et al. April 6, 1 | 1999-04-06 |
System and method for preserving message order while employing both programmed I/O and DMA operations
Grant 5,887,134 - Ebrahim March 23, 1 | 1999-03-23 |
Power sequence controller with wakeup logic for enabling a wakeup interrupt handler procedure
Grant 5,878,264 - Ebrahim March 2, 1 | 1999-03-02 |
Garbage collection system and method for locating root set pointers in method activation records
Grant 5,848,423 - Ebrahim , et al. December 8, 1 | 1998-12-08 |
System level mechanism for invalidating data stored in the external cache of a processor in a computer system
Grant 5,737,755 - Ebrahim , et al. April 7, 1 | 1998-04-07 |
Pipelined distributed bus arbitration system
Grant 5,710,891 - Normoyle , et al. January 20, 1 | 1998-01-20 |
Cache coherent computer system that minimizes invalidation and copyback operations
Grant 5,706,463 - Ebrahim , et al. January 6, 1 | 1998-01-06 |
Method and apparatus for reducing power consumption in a computer network without sacrificing performance
Grant 5,692,197 - Narad , et al. November 25, 1 | 1997-11-25 |
Method and apparatus for interrupt communication in a packet-switched computer system
Grant 5,689,713 - Normoyle , et al. November 18, 1 | 1997-11-18 |
Writeback cancellation processing system for use in a packet switched cache coherent multiprocessor system
Grant 5,684,977 - Van Loo , et al. November 4, 1 | 1997-11-04 |
Memory transaction execution system and method for multiprocessor system having independent parallel transaction queues associated with each processor
Grant 5,657,472 - Van Loo , et al. August 12, 1 | 1997-08-12 |
Transaction activation processor for controlling memory transaction execution in a packet switched cache coherent multiprocessor system
Grant 5,655,100 - Ebrahim , et al. August 5, 1 | 1997-08-05 |
Fast, dual ported cache controller for data processors in a packet switched cache coherent multiprocessor system
Grant 5,644,753 - Ebrahim , et al. July 1, 1 | 1997-07-01 |
Packet switched cache coherent multiprocessor system
Grant 5,634,068 - Nishtala , et al. May 27, 1 | 1997-05-27 |
Parallelized coherent read and writeback transaction processing system for use in a packet switched cache coherent multiprocessor system
Grant 5,581,729 - Nishtala , et al. December 3, 1 | 1996-12-03 |
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