Easwaran; Sri Navaneethakrishnan
Patent Applications and Registrations
Patent applications and USPTO patent grants for Easwaran; Sri Navaneethakrishnan.The latest application filed is for "high voltage tolerant analog-digital output".
- Easwaran; Sri Navaneethakrishnan - Plano TX
- Easwaran; Sri Navaneethakrishnan - Richardson TX
- Easwaran; Sri Navaneethakrishnan - Freising DE
- Easwaran; Sri Navaneethakrishnan - Zurich CH
| Patent | Date |
|---|---|
| Circuit providing reverse current protection for high-side driver Grant 11,368,009 - Easwaran , et al. June 21, 2 | 2022-06-21 |
| High Voltage Tolerant Analog-digital Output App 20210408778 - EASWARAN; Sri Navaneethakrishnan ; et al. | 2021-12-30 |
| Angular resolver imbalance detection Grant 10,884,037 - Chellamuthu , et al. January 5, 2 | 2021-01-05 |
| Ps15 Base Current Sampling In Synchronous Mode App 20200373960 - Easwaran; Sri Navaneethakrishnan ; et al. | 2020-11-26 |
| Circuit providing reverse current protection for high-side driver Grant 10,804,691 - Easwaran , et al. October 13, 2 | 2020-10-13 |
| PSI5 base current sampling in synchronous mode Grant 10,784,917 - Easwaran , et al. Sept | 2020-09-22 |
| Psi5 Base Current Sampling In Synchronous Mode App 20200169284 - Easwaran; Sri Navaneethakrishnan ; et al. | 2020-05-28 |
| Low-energy actuator (LEA) diode detection Grant 10,578,666 - Easwaran , et al. | 2020-03-03 |
| Current sink with negative voltage tolerance Grant 10,520,971 - Easwaran , et al. Dec | 2019-12-31 |
| Circuit Providing Reverse Current Protection For High-side Driver App 20190280472 - Easwaran; Sri Navaneethakrishnan ; et al. | 2019-09-12 |
| Current Sink With Negative Voltage Tolerance App 20190025866 - Easwaran; Sri Navaneethakrishnan ; et al. | 2019-01-24 |
| Angular Resolver Imbalance Detection App 20180073895 - Chellamuthu; Shanmuganand ; et al. | 2018-03-15 |
| Pulse-shaping LDO provides first and second slew-rate increases in amplitude Grant 9,893,757 - Easwaran February 13, 2 | 2018-02-13 |
| Low-energy Actuator (lea) Diode Detection App 20180017601 - EASWARAN; Sri Navaneethakrishnan ; et al. | 2018-01-18 |
| Pulse-shaping Amplifier System App 20170237461 - Easwaran; Sri Navaneethakrishnan | 2017-08-17 |
| Dynamic biasing circuits for low drop out (LDO) regulators Grant 9,710,002 - Easwaran , et al. July 18, 2 | 2017-07-18 |
| Dynamic Biasing Circuits For Low Drop Out (ldo) Regulators App 20160349774 - Easwaran; Sri Navaneethakrishnan ; et al. | 2016-12-01 |
| Driver current control apparatus and methods Grant 9,343,898 - Easwaran May 17, 2 | 2016-05-17 |
| Driver Current Control Apparatus And Methods App 20150318691 - Easwaran; Sri Navaneethakrishnan | 2015-11-05 |
| Electronic device for controlling a current Grant 8,553,388 - Easwaran October 8, 2 | 2013-10-08 |
| Electronic Device For Controlling A Current App 20110216468 - Easwaran; Sri Navaneethakrishnan | 2011-09-08 |
| Bias current generator for multiple supply voltage circuit Grant 7,888,993 - Easwaran , et al. February 15, 2 | 2011-02-15 |
| Low lock time delay locked loops using time cycle suppressor Grant 7,855,584 - Easwaran December 21, 2 | 2010-12-21 |
| Bias Current Generator For Multiplie Supply Voltage Circuit App 20090189647 - Easwaran; Sri Navaneethakrishnan ; et al. | 2009-07-30 |
| Low Lock Time Delay Locked Loops Using Time Cycle Suppressor App 20080297214 - Easwaran; Sri Navaneethakrishnan | 2008-12-04 |
| Low lock time delay locked loops using time cycle suppressor Grant 7,256,635 - Easwaran August 14, 2 | 2007-08-14 |
| Coarse delay tuner circuits with edge suppressors in delay locked loops Grant 7,248,087 - Easwaran July 24, 2 | 2007-07-24 |
| Coarse delay tuner circuits with edge suppressors in delay locked loops App 20060109038 - Easwaran; Sri Navaneethakrishnan | 2006-05-25 |
| Low lock time delay locked loops using time cycle suppressor App 20060103440 - Easwaran; Sri Navaneethakrishnan | 2006-05-18 |
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