loadpatents
name:-0.025609970092773
name:-0.026909112930298
name:-0.0068609714508057
Durham; Christopher M. Patent Filings

Durham; Christopher M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Durham; Christopher M..The latest application filed is for "autonomous robotic avatars".

Company Profile
7.25.23
  • Durham; Christopher M. - Austin TX
  • Durham; Christopher M. - Round Rock TX
  • Durham; Christopher M. - Manassas VA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Autonomous robotic avatars
Grant 10,901,430 - Durham , et al. January 26, 2
2021-01-26
Autonomous robotic avatars
Grant 10,589,425 - Durham , et al.
2020-03-17
Pre-processing partial inputs for accelerating automatic dialog response
Grant 10,395,658 - Durham , et al. A
2019-08-27
Autonomous Robotic Avatars
App 20190160679 - DURHAM; CHRISTOPHER M. ;   et al.
2019-05-30
Autonomous Robotic Avatars
App 20190163199 - DURHAM; CHRISTOPHER M. ;   et al.
2019-05-30
Determining Time To End Recording Of A Program In A Media Stream Using Content Recognition
App 20190132070 - Beck; Chao ;   et al.
2019-05-02
Determining Time To End Recording Of A Program In A Media Stream Using Content Recognition
App 20190132069 - Beck; Chao ;   et al.
2019-05-02
Pre-processing Partial Inputs For Accelerating Automatic Dialog Response
App 20180336903 - Durham; Christopher M. ;   et al.
2018-11-22
Composing music using foresight and planning
Grant 10,109,264 - Cabral , et al. October 23, 2
2018-10-23
Composing Music Using Foresight and Planning
App 20170358285 - Cabral; Alyson T. ;   et al.
2017-12-14
Composing music using foresight and planning
Grant 9,799,312 - Cabral , et al. October 24, 2
2017-10-24
Test structure and methodology for three-dimensional semiconductor structures
Grant 8,729,549 - Bernstein , et al. May 20, 2
2014-05-20
Test structure and methodology for three-dimensional semiconductor structures
Grant 8,294,149 - Bernstein , et al. October 23, 2
2012-10-23
Test Structure And Methodology For Three-dimensional Semiconductor Structures
App 20120262197 - Bernstein; Kerry ;   et al.
2012-10-18
Test Structure And Methodology For Three-dimensional Semiconductor Structures
App 20120264241 - Bernstein; Kerry ;   et al.
2012-10-18
Structure for reduced area active above-ground and below-supply noise suppression circuits
Grant 8,196,073 - Dagher , et al. June 5, 2
2012-06-05
Structure for automated transistor tuning in an integrated circuit design
Grant 8,010,932 - Durham , et al. August 30, 2
2011-08-30
Structure for a configurable low power high fan-in multiplexer
Grant 7,693,701 - Chiang , et al. April 6, 2
2010-04-06
Transmission gate multiplexer
Grant 7,633,316 - Chiang , et al. December 15, 2
2009-12-15
Techniques for reducing power requirements of an integrated circuit
Grant 7,605,612 - Chiang , et al. October 20, 2
2009-10-20
Test Structure And Methodology For Three-dimensional Semiconductor Structures
App 20090114913 - Bernstein; Kerry ;   et al.
2009-05-07
Reduced Area Active Above-ground And Below-supply Noise Suppression Circuits
App 20090102509 - Dagher; Rafik ;   et al.
2009-04-23
Structure for Reduced Area Active Above-Ground and Below-Supply Noise Suppression Circuits
App 20090106708 - Dagher; Rafik F. ;   et al.
2009-04-23
Structure for Transmission Gate Multiplexer
App 20090096486 - Chiang; Owen ;   et al.
2009-04-16
Reduced area active above-ground and below-supply noise suppression circuits
Grant 7,511,529 - Dagher , et al. March 31, 2
2009-03-31
Transmission Gate Multiplexer
App 20090072863 - Chiang; Owen ;   et al.
2009-03-19
Method and apparatus for a configurable low power high fan-in multiplexer
Grant 7,466,164 - Chiang , et al. December 16, 2
2008-12-16
Transmission gate multiplexer
Grant 7,466,165 - Chiang , et al. December 16, 2
2008-12-16
Method And Apparatus For A Configurable Low Power High Fan-in Multiplexer
App 20080303553 - CHIANG; OWEN ;   et al.
2008-12-11
Structure For A Configurable Low Power High Fan-in Multiplexer
App 20080303554 - CHIANG; Owen ;   et al.
2008-12-11
Structure For Automated Transistor Tuning In An Integrated Circuit Design
App 20080229260 - DURHAM; CHRISTOPHER M. ;   et al.
2008-09-18
Double-edge triggered scannable pulsed flip-flop for high frequency and/or low power applications
App 20080215941 - Durham; Christopher M. ;   et al.
2008-09-04
Double-edge Triggered Scannable Pulsed Flip-flop For High Frequency And/or Low Power Applications
App 20080082882 - Durham; Christopher M. ;   et al.
2008-04-03
Method, System and Program Product for Automated Transistor Tuning in an Integrated Circuit Design
App 20080016475 - Durham; Christopher M. ;   et al.
2008-01-17
Method and apparatus for transmitting data that utilizes delay elements to reduce capacitive coupling
Grant 6,832,277 - Durham , et al. December 14, 2
2004-12-14
Multistage, Single-rail Logic Circuitry And Method Therefore
App 20040178825 - Amatangelo, Matthew J. ;   et al.
2004-09-16
Multistage, single-rail logic circuitry and method therefore
Grant 6,791,363 - Amatangelo , et al. September 14, 2
2004-09-14
High-speed flip-flop circuitry and method for operating the same
App 20040150449 - Durham, Christopher M. ;   et al.
2004-08-05
Data processing system, method, and product for automatically performing timing checks on a memory cell using a static timing tool
Grant 6,650,592 - Amatangelo , et al. November 18, 2
2003-11-18
Data processing system, method, and product for automatically performing timing checks on a memory cell using a static timing tool
App 20030099129 - Amatangelo, Matthew J. ;   et al.
2003-05-29
Method and apparatus for transmitting data
App 20030028692 - Durham, Christopher M. ;   et al.
2003-02-06
Master-slave flip-flop circuit with embedded hold function and method for holding data in a master-slave flip-flop circuit
Grant 6,445,236 - Bernard , et al. September 3, 2
2002-09-03
Extended segmented precharge architecture
Grant 5,592,426 - Jallice , et al. January 7, 1
1997-01-07
Address transition detection (ATD) circuit for asynchronous VLSI chips
Grant 5,566,130 - Durham , et al. October 15, 1
1996-10-15
Self-timed control circuit for self-resetting logic circuitry
Grant 5,565,798 - Durham , et al. October 15, 1
1996-10-15
Single-rail self-resetting logic circuitry
Grant 5,550,490 - Durham , et al. August 27, 1
1996-08-27
Zero standby power, radiation hardened, memory redundancy circuit
Grant 4,996,670 - Ciraula , et al. February 26, 1
1991-02-26

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