Dudnikov, JR.; George

Patent Applications and Registrations

Patent applications and USPTO patent grants for Dudnikov, JR.; George.The latest application filed is for "simultaneous and selective wide gap partitioning of via structures using plating resist".

Company Profile

1.9.8

Dudnikov, JR.; George - San Jose CA
Dudnikov, Jr.; George - Zhuhai CN
Dudnikov, JR.; George - Zhuhai City CN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Simultaneous And Selective Wide Gap Partitioning Of Via Structures Using Plating Resist App 20200383204 - Iketani; Shinichi ; et al.	2020-12-03
Simultaneous and selective wide gap partitioning of via structures using plating resist Grant 10,667,390 - Iketani , et al.	2020-05-26
Simultaneous And Selective Wide Gap Partitioning Of Via Structures Using Plating Resist App 20180098426 - Iketani; Shinichi ; et al.	2018-04-05
Printed circuit boards and methods for manufacturing same Grant 9,900,978 - Su , et al. February 20, 2	2018-02-20
Simultaneous and selective wide gap partitioning of via structures using plating resist Grant 9,781,830 - Iketani , et al. October 3, 2	2017-10-03
Simultaneous And Selective Wide Gap Partitioning Of Via Structures Using Plating Resist App 20140251663 - Iketani; Shinichi ; et al.	2014-09-11
Printed Circuit Board And Fabricating Method Thereof App 20140190733 - Dudnikov, JR.; George ; et al.	2014-07-10
Simultaneous and selective partitioning of via structures using plating resist Grant 8,667,675 - Dudnikov, Jr. March 11, 2	2014-03-11
Simultaneous and selective partitioning of via structures using plating resist Grant 8,222,537 - Dudnikov, Jr. , et al. July 17, 2	2012-07-17
Substantially continuous layer of embedded transient protection for printed circuit boards Grant 8,156,640 - Dudnikov, Jr. , et al. April 17, 2	2012-04-17
Substantially continuous layer of embedded transient protection for printed circuit boards Grant 7,688,598 - Dudnikov, Jr. , et al. March 30, 2	2010-03-30
Simultaneous and Selective Partitioning of Via Structures Using Plating Resist App 20090288874 - Dudnikov, JR.; George ; et al.	2009-11-26
Selective deposition of embedded transient protection for printed circuit boards Grant 7,593,203 - Dudnikov, Jr. , et al. September 22, 2	2009-09-22
Substantially Continuous Layer of Embedded Transient Protection For Printed Circuit Boards App 20090025213 - Dudnikov, JR.; George ; et al.	2009-01-29
Simultaneous and selective partitioning of via structures using plating resist App 20080301934 - Dudnikov, JR.; George	2008-12-11
Simultaneous and selective partitioning of via structures using plating resist App 20080296057 - Dudnikov, JR.; George	2008-12-04

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