loadpatents
name:-0.0086400508880615
name:-0.034754991531372
name:-0.010329008102417
Draper; Andrew Patent Filings

Draper; Andrew

Patent Applications and Registrations

Patent applications and USPTO patent grants for Draper; Andrew.The latest application filed is for "seamless firmware update mechanism".

Company Profile
6.29.8
  • Draper; Andrew - Chesham GB
  • Draper; Andrew - Santa Clara US
  • Draper; Andrew - Grosse Pointe MI
  • Draper; Andrew - Bucks GB
  • Draper; Andrew - Gross Pointe MI
  • Draper; Andrew - High Wycombe GB
  • Draper; Andrew - Chesham Bucks GB
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Seamless Firmware Update Mechanism
App 20220245252 - Smith; Ned M. ;   et al.
2022-08-04
End-to-end Device Attestation
App 20210314365 - Smith; Ned M. ;   et al.
2021-10-07
System, method, and computer readable storage medium for controlling an in car communication system
Grant 11,039,250 - Draper , et al. June 15, 2
2021-06-15
System, Method, And Computer Readable Storage Medium For Controlling An In Car Communication System
App 20210092522 - DRAPER; Andrew ;   et al.
2021-03-25
Regional partial reconfiguration of a programmable device
Grant 10,659,052 - Atsatt , et al.
2020-05-19
Regional Partial Reconfiguration Of A Programmable Device
App 20190199354 - Atsatt; Sean R. ;   et al.
2019-06-27
Method of operating an ad hoc network to protect a passenger-as-a-pedestrian and system to protect a passenger-as-a-pedestrian
Grant 10,272,876 - Draper , et al.
2019-04-30
Maintaining Reconfigurable Partitions In A Programmable Device
App 20190095113 - Atsatt; Sean R. ;   et al.
2019-03-28
Maintaining reconfigurable partitions in a programmable device
Grant 10,223,014 - Atsatt , et al.
2019-03-05
Regional partial reconfiguration of a programmable device
Grant 10,218,359 - Atsatt , et al. Feb
2019-02-26
Regional Partial Reconfiguration Of A Programmable Device
App 20190007050 - Atsatt; Sean R. ;   et al.
2019-01-03
Method Of Operating An Ad Hoc Network To Protect A Passenger-as-a-pedestrian And System To Protect A Passenger-as-a-pedestrian
App 20180174452 - DRAPER; Andrew ;   et al.
2018-06-21
System and methods for debug connectivity discovery
Grant 9,404,968 - Draper August 2, 2
2016-08-02
Booting mechanism for FPGA-based embedded system
Grant 8,412,918 - Allen , et al. April 2, 2
2013-04-02
Embedded processor with dual-port SRAM for programmable logic
Grant 8,190,828 - May , et al. May 29, 2
2012-05-29
Booting mechanism for FPGA-based embedded system
Grant 7,822,958 - Allen , et al. October 26, 2
2010-10-26
Methods and apparatus for handling reset events in a bus bridge
Grant 7,657,689 - Crosland , et al. February 2, 2
2010-02-02
Techniques for configuring an embedded processor operating system
Grant 7,584,348 - Draper , et al. September 1, 2
2009-09-01
Split filtering in multilayer systems
Grant 7,549,004 - Sousa , et al. June 16, 2
2009-06-16
Embedded processor with dual-port SRAM for programmable logic
Grant 7,546,424 - May , et al. June 9, 2
2009-06-09
Methods and apparatus for debugging a system with a hung data bus
Grant 7,412,624 - Draper August 12, 2
2008-08-12
Embedded processor with watchdog timer for programmable logic
Grant 7,350,178 - Crosland , et al. March 25, 2
2008-03-25
Configuring both a programmable logic device and its embedded logic with a single serialized configuration bit stream
Grant 7,343,483 - May , et al. March 11, 2
2008-03-11
Embedded processor with watchdog timer for programmable logic
Grant 7,340,596 - Crosland , et al. March 4, 2
2008-03-04
Digital data error insertion methods and apparatus
Grant 7,321,996 - Draper , et al. January 22, 2
2008-01-22
Microprocessor system
Grant 7,263,623 - Crosland , et al. August 28, 2
2007-08-28
Prefetching data based on predetermined criteria
Grant 7,249,222 - Bellis , et al. July 24, 2
2007-07-24
Embedded processor with dual-port SRAM for programmable logic
Grant 7,096,324 - May , et al. August 22, 2
2006-08-22
Interface controller using JTAG scan chain
Grant 7,078,929 - Draper , et al. July 18, 2
2006-07-18
Distributed bus structure
Grant 7,064,578 - Crosland , et al. June 20, 2
2006-06-20
Address decoder for programmable logic device
Grant 6,937,061 - Crosland , et al. August 30, 2
2005-08-30
Reconfigurable programmable logic system with peripheral identification data
Grant 6,862,724 - Riley , et al. March 1, 2
2005-03-01
Apparatus and methods for shared memory interfaces in programmable logic devices
Grant 6,828,822 - Bellis , et al. December 7, 2
2004-12-07
Synchronization of hardware and software debuggers
Grant 6,826,717 - Draper , et al. November 30, 2
2004-11-30
Configuring both a programmable logic device and its embedded logic with a single serialized configuration bit stream
Grant 6,732,263 - May , et al. May 4, 2
2004-05-04

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed