Drapala; Garrett
Patent Applications and Registrations
Patent applications and USPTO patent grants for Drapala; Garrett.The latest application filed is for "cache coherency protocol for allowing parallel data fetches and eviction to the same addressable index".
- Drapala; Garrett - Poughkeepsie NY US
| Patent | Date |
|---|---|
| Cache coherency protocol for allowing parallel data fetches and eviction to the same addressable index Grant 9,003,125 - Ambroladze , et al. April 7, 2 | 2015-04-07 |
| Cache Coherency Protocol For Allowing Parallel Data Fetches And Eviction To The Same Addressable Index App 20130339622 - Ambroladze; Ekaterina M. ; et al. | 2013-12-19 |
| Method and apparatus for SRAM macro sparing in computer chips Grant 7,702,972 - Bronson , et al. April 20, 2 | 2010-04-20 |
| Method and Apparatus for SRAM Macro Sparing in Computer Chips App 20090106607 - Bronson; Timothy Carl ; et al. | 2009-04-23 |
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