loadpatents
name:-0.013222932815552
name:-0.012709140777588
name:-0.00060796737670898
Downes; Keith E. Patent Filings

Downes; Keith E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Downes; Keith E..The latest application filed is for "dual-damascene process to fabricate thick wire structure".

Company Profile
0.13.12
  • Downes; Keith E. - Stowe VT
  • Downes; Keith E - Stowe VT
  • Downes; Keith E. - Jericho VT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Dual-damascene process to fabricate thick wire structure
Grant 9,171,778 - Coolbaugh , et al. October 27, 2
2015-10-27
Dual-damascene process to fabricate thick wire structure
Grant 8,753,950 - Coolbaugh , et al. June 17, 2
2014-06-17
Dual-damascene Process To Fabricate Thick Wire Structure
App 20140151899 - COOLBAUGH; Douglas D. ;   et al.
2014-06-05
Process for single and multiple level metal-insulator-metal integration with a single mask
Grant 8,435,864 - Chinthakindi , et al. May 7, 2
2013-05-07
Dual-damascene process to fabricate thick wire structure
Grant 8,236,663 - Coolbaugh , et al. August 7, 2
2012-08-07
Dual-damascene Process To Fabricate Thick Wire Structure
App 20120190164 - COOLBAUGH; Douglas D. ;   et al.
2012-07-26
Method and structure for creation of a metal insulator metal capacitor
Grant 8,227,849 - Eshun , et al. July 24, 2
2012-07-24
Process For Single And Multiple Level Metal-insulator-metal Integration With A Single Mask
App 20120184081 - CHINTHAKINDI; Anil K. ;   et al.
2012-07-19
Process for single and multiple level metal-insulator-metal integration with a single mask
Grant 8,207,568 - Chinthakindi , et al. June 26, 2
2012-06-26
Method Of Fabricating A Precision Buried Resistor
App 20110108919 - Chinthakindi; Anil K. ;   et al.
2011-05-12
Method of fabricating a precision buried resistor
Grant 7,910,450 - Chinthakindi , et al. March 22, 2
2011-03-22
Metal seed layer deposition
Grant 7,879,716 - Barkyoumb , et al. February 1, 2
2011-02-01
Method And Structure For Creation Of A Metal Insulator Metal Capacitor
App 20100149723 - ESHUN; EBENEZER E. ;   et al.
2010-06-17
Method and structure for creation of a metal insulator metal capacitor
Grant 7,728,372 - Eshun , et al. June 1, 2
2010-06-01
Dual-damascene Process To Fabricate Thick Wire Structure
App 20100009509 - Coolbaugh; Douglas D. ;   et al.
2010-01-14
Dual-damascene process to fabricate thick wire structure
Grant 7,602,068 - Coolbaugh , et al. October 13, 2
2009-10-13
Method And Structure For Creation Of A Metal Insulator Metal Capacitor
App 20070262416 - Eshun; Ebenezer E. ;   et al.
2007-11-15
Method Of Fabricating A Precision Buried Resistor
App 20070194390 - Chinthakindi; Anil K. ;   et al.
2007-08-23
Dual-damascene Process To Fabricate Thick Wire Structure
App 20070190718 - Coolbaugh; Douglas D. ;   et al.
2007-08-16
Metal Seed Layer Deposition
App 20070155164 - Barkyoumb; Steven P. ;   et al.
2007-07-05
Metal seed layer deposition
Grant 7,235,487 - Barkyoumb , et al. June 26, 2
2007-06-26
Process For Single And Multiple Level Metal-insulator-metal Integration With A Single Mask
App 20070065966 - Chinthakindi; Anil K. ;   et al.
2007-03-22
Metal Seed Layer Deposition
App 20050253265 - Barkyoumb, Steven P. ;   et al.
2005-11-17

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