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Patent applications and USPTO patent grants for Downes, Jr.; Francis J..The latest application filed is for "integrated circuit structure".
Patent | Date |
---|---|
Integrated circuit structure Grant 6,887,779 - Alcoe , et al. May 3, 2 | 2005-05-03 |
Method of making a multi-layered interconnect structure Grant 6,829,823 - Downes, Jr. , et al. December 14, 2 | 2004-12-14 |
Integrated circuit structure Grant 6,720,502 - Alcoe , et al. April 13, 2 | 2004-04-13 |
Formation of a metallic interlocking structure Grant 6,693,031 - Advocate, Jr. , et al. February 17, 2 | 2004-02-17 |
Arrangement and method for degassing small-high aspect ratio drilled holes prior to wet chemical processing Grant 6,626,196 - Downes, Jr. , et al. September 30, 2 | 2003-09-30 |
Chip C4 assembly improvement using magnetic force and adhesive Grant 6,429,384 - Downes, Jr. , et al. August 6, 2 | 2002-08-06 |
Electronic package with high density interconnect layer Grant 6,373,717 - Downes, Jr. , et al. April 16, 2 | 2002-04-16 |
Metallic interlocking structure Grant 6,348,737 - Advocate, Jr. , et al. February 19, 2 | 2002-02-19 |
Laminated electroplating rack and connection system for optimized plating Grant 6,176,985 - Downes, Jr. , et al. January 23, 2 | 2001-01-23 |
Chip C4 assembly improvement using magnetic force and adhesive Grant 6,142,361 - Downes, Jr. , et al. November 7, 2 | 2000-11-07 |
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