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name:-0.051316022872925
name:-0.051079988479614
name:-0.0073399543762207
Doris; Bruce Patent Filings

Doris; Bruce

Patent Applications and Registrations

Patent applications and USPTO patent grants for Doris; Bruce.The latest application filed is for "device with integration of light-emitting diode, light sensor, and bio-electrode sensors on a substrate".

Company Profile
6.60.50
  • Doris; Bruce - Slingerlands NY
  • Doris; Bruce - Brewster NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Device with integration of light-emitting diode, light sensor, and bio-electrode sensors on a substrate
Grant 11,164,992 - Holmes , et al. November 2, 2
2021-11-02
Device With Integration of Light-Emitting Diode, Light Sensor, and Bio-Electrode Sensors on a Substrate
App 20200083398 - Holmes; Steve ;   et al.
2020-03-12
Device with integration of light-emitting diode, light sensor, and bio-electrode sensors on a substrate
Grant 10,566,493 - Holmes , et al. Feb
2020-02-18
Device With Integration Of Light-emitting Diode, Light Sensor, And Bio-electrode Sensors On A Substrate
App 20200044113 - Holmes; Steve ;   et al.
2020-02-06
Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon region
Grant 10,170,475 - Allegret-Maret , et al. J
2019-01-01
Fabrication of silicon germanium-on-insulator FinFET
Grant 10,163,684 - Doris , et al. Dec
2018-12-25
FinFET device having a high germanium content fin structure and method of making same
Grant 10,062,714 - Doris , et al. August 28, 2
2018-08-28
Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon-germanium region
Grant 10,038,075 - Allegret-Maret , et al. July 31, 2
2018-07-31
Fabrication Of Silicon Germanium-on-insulator Finfet
App 20180096883 - Doris; Bruce ;   et al.
2018-04-05
Fabrication of silicon germanium-on-insulator finFET
Grant 9,899,253 - Doris , et al. February 20, 2
2018-02-20
Forming A Silicon Based Layer In A Trench To Prevent Corner Rounding
App 20180005826 - JACOB; Ajey P. ;   et al.
2018-01-04
Isolation regions for SOI devices
Grant 9,768,055 - Liu , et al. September 19, 2
2017-09-19
Silicon-on-nothing Transistor Semiconductor Structure With Channel Epitaxial Silicon Region
App 20170179137 - ALLEGRET-MARET; STEPHANE ;   et al.
2017-06-22
Silicon-on-nothing Transistor Semiconductor Structure With Channel Epitaxial Silicon-germanium Region
App 20170170299 - ALLEGRET-MARET; STEPHANE ;   et al.
2017-06-15
Methods of forming fin isolation regions on FinFET semiconductor devices by implantation of an oxidation-retarding material
Grant 9,673,083 - Jacob , et al. June 6, 2
2017-06-06
Fin isolation structures facilitating different fin isolation schemes
Grant 9,673,222 - Jacob , et al. June 6, 2
2017-06-06
Methods of forming alternative channel materials on a non-planar semiconductor device and the resulting device
Grant 9,627,245 - Jacob , et al. April 18, 2
2017-04-18
Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon region
Grant 9,620,506 - Loubet , et al. April 11, 2
2017-04-11
Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon-germanium region
Grant 9,620,507 - Loubet , et al. April 11, 2
2017-04-11
Low leakage dual STI integrated circuit including FDSOI transistors
Grant 9,601,511 - Vinet , et al. March 21, 2
2017-03-21
Methods of modulating strain in PFET and NFET FinFET semiconductor devices
Grant 9,589,849 - Jacob , et al. March 7, 2
2017-03-07
Dual STI integrated circuit including FDSOI transistors and method for manufacturing the same
Grant 9,570,465 - Vinet , et al. February 14, 2
2017-02-14
Methods of forming replacement fins for a FinFET device using a targeted thickness for the patterned fin etch mask
Grant 9,536,990 - Akarvardar , et al. January 3, 2
2017-01-03
Silicon Germanium-on-insulator Finfet
App 20160379867 - DORIS; BRUCE ;   et al.
2016-12-29
Silicon germanium-on-insulator FinFET
Grant 9,515,185 - Liu , et al. December 6, 2
2016-12-06
Methods Of Forming Replacement Fins For A Finfet Device Using A Targeted Thickness For The Patterned Fin Etch Mask
App 20160351681 - Akarvardar; Murat Kerem ;   et al.
2016-12-01
Finfet Device Having A High Germanium Content Fin Structure And Method Of Making Same
App 20160293638 - Doris; Bruce ;   et al.
2016-10-06
Fin Isolation Structures Facilitating Different Fin Isolation Schemes
App 20160260742 - JACOB; Ajey Poovannummoottil ;   et al.
2016-09-08
Methods Of Modulating Strain In Pfet And Nfet Finfet Semiconductor Devices
App 20160254195 - Jacob; Ajey Poovannummoottil ;   et al.
2016-09-01
Methods of forming fin isolation regions on FinFET semiconductor devices using an oxidation-blocking layer of material and by performing a fin-trimming process
Grant 9,431,306 - Jacob , et al. August 30, 2
2016-08-30
FinFET device having a high germanium content fin structure and method of making same
Grant 9,431,514 - Liu , et al. August 30, 2
2016-08-30
Methods Of Forming Fin Isolation Regions On Finfet Semiconductor Devices Using An Oxidation-blocking Layer Of Material And By Performing A Fin-trimming Process
App 20160225677 - Jacob; Ajey Poovannummoottil ;   et al.
2016-08-04
Methods Of Forming Fin Isolation Regions On Finfet Semiconductor Devices By Implantation Of An Oxidation-retarding Material
App 20160225659 - Jacob; Ajey Poovannummoottil ;   et al.
2016-08-04
Silicon Germanium-on-insulator Finfet
App 20160190303 - LIU; Qing ;   et al.
2016-06-30
Finfet Device Having A High Germanium Content Fin Structure And Method Of Making Same
App 20160181395 - Liu; Qing ;   et al.
2016-06-23
Methods of forming fin isolation regions on finFET semiconductor devices using an oxidation-blocking layer of material
Grant 9,349,658 - Jacob , et al. May 24, 2
2016-05-24
Virtual relaxed substrate on edge-relaxed composite semiconductor pillars
Grant 9,337,022 - Akarvardar , et al. May 10, 2
2016-05-10
Methods of forming replacement fins for a FinFET device
Grant 9,324,618 - Akarvardar , et al. April 26, 2
2016-04-26
Method for single fin cuts using selective ion implants
Grant 9,287,130 - Cai , et al. March 15, 2
2016-03-15
Strained silicon and strained silicon germanium on insulator field-effect transistor
Grant 9,281,247 - Bedell , et al. March 8, 2
2016-03-08
Forming strained and relaxed silicon and silicon germanium fins on the same wafer
Grant 9,281,381 - Basker , et al. March 8, 2
2016-03-08
Integrated circuit with a thin body field effect transistor and capacitor
Grant 9,245,807 - Cheng , et al. January 26, 2
2016-01-26
Low Leakage Dual Sti Integrated Circuit Including Fdsoi Transistors
App 20160013206 - VINET; Maud ;   et al.
2016-01-14
Dual Sti Integrated Circuit Including Fdsoi Transistors And Method For Manufacturing The Same
App 20160013205 - VINET; Maud ;   et al.
2016-01-14
Methods Of Forming Alternative Channel Materials On A Non-planar Semiconductor Device And The Resulting Device
App 20150255295 - Jacob; Ajey Poovannummoottil ;   et al.
2015-09-10
Methods of forming isolated germanium-containing fins for a FinFET semiconductor device
Grant 9,117,875 - Jacob , et al. August 25, 2
2015-08-25
MOSFET with work function adjusted metal backgate
Grant 9,105,577 - Cheng , et al. August 11, 2
2015-08-11
Methods Of Forming Isolated Germanium-containing Fins For A Finfet Semiconductor Device
App 20150200128 - Jacob; Ajey Poovannummoottil ;   et al.
2015-07-16
Integrated circuit with a thin body field effect transistor and capacitor
Grant 9,070,788 - Cheng , et al. June 30, 2
2015-06-30
Memory device having multiple dielectric gate stacks and related methods
Grant 9,006,816 - Khare , et al. April 14, 2
2015-04-14
Method for the formation of a protective dual liner for a shallow trench isolation structure
Grant 8,962,430 - Liu , et al. February 24, 2
2015-02-24
Forming strained and relaxed silicon and silicon germanium fins on the same wafer
Grant 8,951,870 - Basker , et al. February 10, 2
2015-02-10
Silicon-on-nothing Transistor Semiconductor Structure With Channel Epitaxial Silicon Region
App 20140353717 - Loubet; Nicolas ;   et al.
2014-12-04
Method For The Formation Of A Protective Dual Liner For A Shallow Trench Isolation Structure
App 20140357039 - Liu; Qing ;   et al.
2014-12-04
Silicon-on-nothing Transistor Semiconductor Structure With Channel Epitaxial Silicon-germanium Region
App 20140353718 - Loubet; Nicolas ;   et al.
2014-12-04
Raised source/drain structure for enhanced strain coupling from stress liner
Grant 8,890,245 - Cheng , et al. November 18, 2
2014-11-18
Memory device having multiple dielectric gate stacks with first and second dielectric layers and related methods
Grant 8,860,123 - Khare , et al. October 14, 2
2014-10-14
Strained silicon and strained silicon germanium on insulator
Grant 8,859,348 - Bedell , et al. October 14, 2
2014-10-14
Raised source/drain structure for enhanced strain coupling from stress liner
Grant 8,853,038 - Cheng , et al. October 7, 2
2014-10-07
Memory Device Having Multiple Dielectric Gate Stacks With First And Second Dielectric Layers And Related Methods
App 20140291750 - KHARE; Prasanna ;   et al.
2014-10-02
Memory Device Having Multiple Dielectric Gate Stacks And Related Methods
App 20140291749 - KHARE; Prasanna ;   et al.
2014-10-02
Forming Strained And Relaxed Silicon And Silicon Germanium Fins On The Same Wafer
App 20140264595 - BASKER; Veeraraghavan S. ;   et al.
2014-09-18
Forming Strained And Relaxed Silicon And Silicon Germanium Fins On The Same Wafer
App 20140264602 - BASKER; Veeraraghavan S. ;   et al.
2014-09-18
Integrated Circuit With A Thin Body Field Effect Transistor And Capacitor
App 20140145254 - CHENG; Kangguo ;   et al.
2014-05-29
Integrated Circuit With A Thin Body Field Effect Transistor And Capacitor
App 20140141575 - CHENG; Kangguo ;   et al.
2014-05-22
MOSFET with recessed channel film and abrupt junctions
Grant 8,691,650 - Cheng , et al. April 8, 2
2014-04-08
Electronic Device Including Shallow Trench Isolation (sti) Regions With Bottom Oxide Liner And Upper Nitride Liner And Related Methods
App 20140054699 - LIU; QING ;   et al.
2014-02-27
Integrated circuit with a thin body field effect transistor and capacitor
Grant 8,659,066 - Cheng , et al. February 25, 2
2014-02-25
Integrated circuit with a thin body field effect transistor and capacitor
Grant 8,652,898 - Cheng , et al. February 18, 2
2014-02-18
MOSFET with recessed channel film and abrupt junctions
Grant 8,629,502 - Cheng , et al. January 14, 2
2014-01-14
Strained Silicon And Strained Silicon Germanium On Insulator
App 20140011328 - BEDELL; Stephen W. ;   et al.
2014-01-09
Strained Silicon And Strained Silicon Germanium On Insulator
App 20140008729 - BEDELL; Stephen W. ;   et al.
2014-01-09
MOSFET with thin semiconductor channel and embedded stressor with enhanced junction isolation
Grant 8,575,698 - Cheng , et al. November 5, 2
2013-11-05
Mosfet With Work Function Adjusted Metal Backgate
App 20130214356 - Cheng; Kangguo ;   et al.
2013-08-22
Integrated Circuit With A Thin Body Field Effect Transistor And Capacitor
App 20130178021 - CHENG; Kangguo ;   et al.
2013-07-11
Integrated Circuit With A Thin Body Field Effect Transistor And Capacitor
App 20130175596 - CHENG; Kangguo ;   et al.
2013-07-11
Method and Structure For Forming On-Chip High Quality Capacitors With ETSOI Transistors
App 20130146959 - Cheng; Kangguo ;   et al.
2013-06-13
Fully-depleted SON
Grant 8,455,308 - Cheng , et al. June 4, 2
2013-06-04
FET with self-aligned back gate
Grant 8,421,156 - Cheng , et al. April 16, 2
2013-04-16
Raised Source/drain Structure For Enhanced Strain Coupling From Stress Liner
App 20130011975 - CHENG; Kangguo ;   et al.
2013-01-10
Mosfet With Recessed Channel Film And Abrupt Junctions
App 20120326232 - Cheng; Kangguo ;   et al.
2012-12-27
Raised source/drain structure for enhanced strain coupling from stress liner
Grant 8,338,260 - Cheng , et al. December 25, 2
2012-12-25
Structure and method to minimize regrowth and work function shift in high-k gate stacks
Grant 8,324,074 - Cheng , et al. December 4, 2
2012-12-04
Raised Source/drain Structure For Enhanced Strain Coupling From Stress Liner
App 20120299103 - CHENG; Kangguo ;   et al.
2012-11-29
MOSFET with Recessed channel FILM and Abrupt Junctions
App 20120261754 - Cheng; Kangguo ;   et al.
2012-10-18
Fully-depleted Son
App 20120235238 - Cheng; Kangguo ;   et al.
2012-09-20
FET with Self-Aligned Back Gate
App 20110316083 - Cheng; Kangguo ;   et al.
2011-12-29
Raised Source/drain Structure For Enhanced Strain Coupling From Stress Liner
App 20110254090 - Cheng; Kangguo ;   et al.
2011-10-20
Methods of planarization
Grant 7,041,600 - Dokumaci , et al. May 9, 2
2006-05-09
Methods Of Planarization
App 20040266195 - Dokumaci, Omer ;   et al.
2004-12-30

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