Donze; Richard Lee

Patent Applications and Registrations

Patent applications and USPTO patent grants for Donze; Richard Lee.The latest application filed is for "semiconductor scheme for reduced circuit area in a simplified process".

Company Profile

0.11.13

Donze; Richard Lee - Rochester MN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor scheme for reduced circuit area in a simplified process Grant 7,935,629 - Christensen , et al. May 3, 2	2011-05-03
FinFET body contact structure Grant 7,696,565 - Donze , et al. April 13, 2	2010-04-13
Electrical open/short contact alignment structure for active region vs. gate region Grant 7,659,733 - Donze , et al. February 9, 2	2010-02-09
Semiconductor scheme for reduced circuit area in a simplified process Grant 7,626,220 - Christensen , et al. December 1, 2	2009-12-01
Electrical open/short contact alignment structure for active region vs. gate region Grant 7,453,272 - Donze , et al. November 18, 2	2008-11-18
Semiconductor Scheme for Reduced Circuit Area in a Simplified Process App 20080102627 - Christensen; Todd Alan ; et al.	2008-05-01
Semiconductor Scheme for Reduced Circuit Area in a Simplified Process App 20080093683 - Christensen; Todd Alan ; et al.	2008-04-24
Measurement of bias of a silicon area using bridging vertices on polysilicon shapes to create an electrical open/short contact structure Grant 7,336,086 - Donze , et al. February 26, 2	2008-02-26
Semiconductor scheme for reduced circuit area in a simplified process Grant 7,317,217 - Christensen , et al. January 8, 2	2008-01-08
Method and apparatus for improving performance margin in logic paths Grant 7,317,605 - Donze , et al. January 8, 2	2008-01-08
FinFET Body Contact Structure App 20070202659 - Donze; Richard Lee ; et al.	2007-08-30
FinFET body contact structure Grant 7,241,649 - Donze , et al. July 10, 2	2007-07-10
Polysilicon Conductor Width Measurement for 3-Dimensional FETs App 20070128740 - Donze; Richard Lee ; et al.	2007-06-07
Polysilicon conductor width measurement for 3-dimensional FETs Grant 7,227,183 - Donze , et al. June 5, 2	2007-06-05
Electrical Open/Short Contact Alignment Structure for Active Region vs. Gate Region App 20070102700 - Donze; Richard Lee ; et al.	2007-05-10
Electrical Open/Short Contact Alignment Structure for Active Region vs. Gate Region App 20070068627 - Donze; Richard Lee ; et al.	2007-03-29
Electrical Open/Short Contact Alignment Structure for Active Region vs. Gate Region App 20070072385 - Donze; Richard Lee ; et al.	2007-03-29
Electrical open/short contact alignment structure for active region vs. gate region Grant 7,183,780 - Donze , et al. February 27, 2	2007-02-27
FinFET body contact structure App 20060091463 - Donze; Richard Lee ; et al.	2006-05-04
Semiconductor scheme for reduced circuit area in a simplified process App 20060060926 - Christensen; Todd Alan ; et al.	2006-03-23
Fin FET diode structures and methods for building App 20060063334 - Donze; Richard Lee ; et al.	2006-03-23
Electrical open/short contact alignment structure for active region vs. gate region App 20060060844 - Donze; Richard Lee ; et al.	2006-03-23
Polysilicon conductor width measurement for 3-dimensional FETs App 20060063317 - Donze; Richard Lee ; et al.	2006-03-23
Method and apparatus for improving performance margin in logic paths App 20050201188 - Donze, Richard Lee ; et al.	2005-09-15

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