Domengie; Florian

Patent Applications and Registrations

Patent applications and USPTO patent grants for Domengie; Florian.The latest application filed is for "process for forming a layer of a work function metal for a mosfet gate having a uniaxial grain orientation".

Company Profile

2.6.7

Domengie; Florian - Crolles FR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Process For Forming A Layer Of A Work Function Metal For A Mosfet Gate Having A Uniaxial Grain Orientation App 20190259618 - Domengie; Florian ; et al.	2019-08-22
Optical coupling device with a wide bandwidth and reduced power losses Grant 10,261,252 - Guerber , et al.	2019-04-16
Process for forming a layer of equiaxed titanium nitride and a MOSFET device having a metal gate electrode including a layer of equiaxed titanium nitride Grant 10,211,059 - Caubet , et al. Feb	2019-02-19
Optical Coupling Device With A Wide Bandwidth And Reduced Power Losses App 20190018191 - Guerber; Sylvain ; et al.	2019-01-17
Optical coupling device with a wide bandwidth and reduced power losses Grant 10,101,528 - Guerber , et al. October 16, 2	2018-10-16
Optical Coupling Device With A Wide Bandwidth And Reduced Power Losses App 20180239088 - Guerber; Sylvain ; et al.	2018-08-23
Process For Forming A Layer Of Equiaxed Titanium Nitride And A Mosfet Device Having A Metal Gate Electrode Including A Layer Of Equiaxed Titanium Nitride App 20170256625 - Caubet; Pierre ; et al.	2017-09-07
Process for forming a layer of equiaxed titanium nitride and a MOSFET device having a metal gate electrode including a layer of equiaxed titanium nitride Grant 9,691,871 - Caubet , et al. June 27, 2	2017-06-27
Process For Forming A Layer Of Equiaxed Titanium Nitride And A Mosfet Device Having A Metal Gate Electrode Including A Layer Of Equiaxed Titanium Nitride App 20170179250 - Caubet; Pierre ; et al.	2017-06-22
Method for producing a metal-gate MOS transistor, in particular a PMOS transistor, and corresponding integrated circuit Grant 9,257,518 - Baudot , et al. February 9, 2	2016-02-09
Method for depositing a low-diffusion TiAlN layer and insulated gate comprising such a layer Grant 9,029,254 - Caubet , et al. May 12, 2	2015-05-12
Method For Producing A Metal-gate Mos Transistor, In Particular A Pmos Transistor, And Corresponding Integrated Circuit App 20140319616 - Baudot; Sylvain ; et al.	2014-10-30
Method For Depositing A Low-diffusion Tialn Layer And Insulated Gate Comprising Such A Layer App 20140097504 - CAUBET; Pierre ; et al.	2014-04-10

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