DOMAE; Shinichi

Patent Applications and Registrations

Patent applications and USPTO patent grants for DOMAE; Shinichi.The latest application filed is for "semiconductor device".

Company Profile

0.7.10

DOMAE; Shinichi - Osaka JP
Domae, Shinichi - Hirakata-shi JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Device App 20130105939 - DOMAE; Shinichi	2013-05-02
Semiconductor Device App 20120280406 - DOMAE; Shinichi	2012-11-08
Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation Grant 8,110,495 - Domae , et al. February 7, 2	2012-02-07
Multilayer Wiring Structure Of Semiconductor Device, Method Of Producing Said Multilayer Wiring Structure And Semiconductor Device To Be Used For Reliability Evaluation App 20110129995 - Domae; Shinichi ; et al.	2011-06-02
Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation Grant 7,911,060 - Domae , et al. March 22, 2	2011-03-22
Multilayer Wiring Structure Of Semiconductor Device, Method Of Producing Said Multilayer Wiring Structure And Semiconductor Device To Be Used For Reliability Evaluation App 20100078827 - DOMAE; Shinichi ; et al.	2010-04-01
Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor to be used for reliability evaluation Grant 7,642,654 - Domae , et al. January 5, 2	2010-01-05
Multilayer Wiring Structure Of Semiconductor Device, Method Of Producing Said Multilayer Wiring Structure And Semiconductor Device To Be Used For Reliability Evaluation App 20090111262 - DOMAE; Shinichi ; et al.	2009-04-30
Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation Grant 7,443,031 - Domae , et al. October 28, 2	2008-10-28
Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation App 20070037453 - Domae; Shinichi ; et al.	2007-02-15
Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation Grant 7,148,572 - Domae , et al. December 12, 2	2006-12-12
Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation Grant 6,815,338 - Domae , et al. November 9, 2	2004-11-09
Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation App 20040201104 - Domae, Shinichi ; et al.	2004-10-14
Multilayer Wiring Structure Of Semiconductor Device, Method Of Producing Said Multilayer Wiring Structure And Semiconductor Device To Be Used For Reliability Evaluation App 20040092097 - Domae, Shinichi ; et al.	2004-05-13
Semiconductor device App 20020005584 - Domae, Shinichi	2002-01-17
Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation App 20010004551 - Domae, Shinichi ; et al.	2001-06-21
Method of producing multilayer wiring device with offset axises of upper and lower plugs Grant 6,197,685 - Domae , et al. March 6, 2	2001-03-06

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