| Patent | Date |
|---|
Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect
Grant RE48,408 - Pagaila , et al. January 26, 2 | 2021-01-26 |
Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect
Grant RE48,111 - Pagaila , et al. | 2020-07-21 |
Semiconductor device and method of forming Fo-WLCSP with recessed interconnect area in peripheral region of semiconductor die
Grant 10,388,584 - Pagaila , et al. A | 2019-08-20 |
Integrated circuit packaging system with substrate and method of manufacture thereof
Grant 10,109,587 - Cuong , et al. October 23, 2 | 2018-10-23 |
Semiconductor device and method of forming a package in-fan out package
Grant 10,068,862 - Do , et al. September 4, 2 | 2018-09-04 |
Integrated circuit packaging system and method of manufacture thereof
Grant 10,043,733 - Pagaila , et al. August 7, 2 | 2018-08-07 |
Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect
Grant 9,893,045 - Pagaila , et al. February 13, 2 | 2018-02-13 |
Package-on-package using through-hole via die on saw streets
Grant 9,847,253 - Do , et al. December 19, 2 | 2017-12-19 |
Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die
Grant 9,824,975 - Pagaila , et al. November 21, 2 | 2017-11-21 |
Integrated circuit packaging system with a grid array with a leadframe and method of manufacture thereof
Grant 9,799,589 - Do , et al. October 24, 2 | 2017-10-24 |
Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material
Grant 9,679,881 - Pagaila , et al. June 13, 2 | 2017-06-13 |
Semiconductor device and method of providing z-interconnect conductive pillars with inner polymer core
Grant 9,640,504 - Pagaila , et al. May 2, 2 | 2017-05-02 |
Integrated circuit packaging system with unplated leadframe and method of manufacture thereof
Grant 9,620,480 - Dimaculangan , et al. April 11, 2 | 2017-04-11 |
Semiconductor device and method of forming conductive vias with trench in saw street
Grant 9,601,369 - Do , et al. March 21, 2 | 2017-03-21 |
Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant
App 20170062390 - Chua; Linda Pei Ee ; et al. | 2017-03-02 |
Semiconductor device and method of forming a shielding layer between stacked semiconductor die
Grant 9,583,446 - Pagaila , et al. February 28, 2 | 2017-02-28 |
Integrated circuit packaging system with routable trace and method of manufacture thereof
Grant 9,576,873 - Do , et al. February 21, 2 | 2017-02-21 |
Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant
Grant 9,530,738 - Chua , et al. December 27, 2 | 2016-12-27 |
Package-in-package using through-hole via die on saw streets
Grant 9,524,938 - Do , et al. December 20, 2 | 2016-12-20 |
Semiconductor Device and Method of Forming a Package In-Fan Out Package
App 20160300817 - Do; Byung Tai ; et al. | 2016-10-13 |
Semiconductor device and method of forming base substrate with recesses for capturing bumped semiconductor die
Grant 9,449,932 - Do , et al. September 20, 2 | 2016-09-20 |
Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation
Grant 9,443,828 - Pagaila , et al. September 13, 2 | 2016-09-13 |
Semiconductor device and method of forming penetrable film encapsulant around semiconductor die and interconnect structure
Grant 9,431,331 - Do , et al. August 30, 2 | 2016-08-30 |
Semiconductor device and method of forming B-stage conductive polymer over contact pads of semiconductor die in Fo-WLCSP
Grant 9,418,941 - Do , et al. August 16, 2 | 2016-08-16 |
Semiconductor device including pre-fabricated shielding frame disposed over semiconductor die
Grant 9,406,619 - Pagaila , et al. August 2, 2 | 2016-08-02 |
Extended redistribution layers bumped wafer
Grant 9,406,647 - Do , et al. August 2, 2 | 2016-08-02 |
Integrated Circuit Packaging System With Package-on-package Mechanism And Method Of Manufacture Thereof
App 20160190056 - Park; SooSan ; et al. | 2016-06-30 |
Semiconductor device and method of using substrate with conductive posts and protective layers to form embedded sensor die package
Grant 9,368,423 - Do , et al. June 14, 2 | 2016-06-14 |
Semiconductor device and method of forming double-sided through vias in saw streets
Grant 9,343,429 - Pagaila , et al. May 17, 2 | 2016-05-17 |
Semiconductor device and method of forming through vias with reflowed conductive material
Grant 9,331,002 - Pagaila , et al. May 3, 2 | 2016-05-03 |
Integrated circuit packaging system with transferable trace lead frame
Grant 9,324,584 - Do , et al. April 26, 2 | 2016-04-26 |
Integrated circuit packaging system with external interconnect and method of manufacture thereof
Grant 9,324,641 - Do , et al. April 26, 2 | 2016-04-26 |
Semiconductor Device and Method of Forming Interposer Frame Over Semiconductor Die to Provide Vertical Interconnect
App 20160111410 - Pagaila; Reza A. ; et al. | 2016-04-21 |
Integrated circuit packaging system with electrical interface and method of manufacture thereof
Grant 9,305,873 - Do , et al. April 5, 2 | 2016-04-05 |
Integrated circuit packaging system with routed circuit lead array and method of manufacture thereof
Grant 9,299,644 - Do , et al. March 29, 2 | 2016-03-29 |
RDL patterning with package on package system
Grant 9,293,385 - Pagaila , et al. March 22, 2 | 2016-03-22 |
Semiconductor device having a vertical interconnect structure using stud bumps
Grant 9,263,361 - Pagaila , et al. February 16, 2 | 2016-02-16 |
Semiconductor die and method of forming noise absorbing regions between THVs in peripheral region of the die
Grant 9,236,352 - Pagaila , et al. January 12, 2 | 2016-01-12 |
Integrated circuit packaging system with terminals and method of manufacture thereof
Grant 9,219,029 - Do , et al. December 22, 2 | 2015-12-22 |
Integrated circuit packaging system with leadframe and method of manufacture thereof
Grant 9,190,349 - Do , et al. November 17, 2 | 2015-11-17 |
Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer
Grant 9,177,848 - Do , et al. November 3, 2 | 2015-11-03 |
Semiconductor device and method of stacking die on leadframe electrically connected by conductive pillars
Grant 9,177,901 - Pagaila , et al. November 3, 2 | 2015-11-03 |
Integrated circuit packaging system with trace protection layer and method of manufacture thereof
Grant 9,177,897 - Do , et al. November 3, 2 | 2015-11-03 |
Semiconductor Device and Method of Forming Substrate Having Conductive Columns
App 20150279815 - Do; Byung Tai ; et al. | 2015-10-01 |
Integrated circuit packaging system with fiber-less substrate and method of manufacture thereof
Grant 9,147,662 - Do , et al. September 29, 2 | 2015-09-29 |
Coreless integrated circuit packaging system and method of manufacture thereof
Grant 9,142,530 - Do , et al. September 22, 2 | 2015-09-22 |
Leadframe system with warp control mechanism and method of manufacture thereof
Grant 9,123,712 - Do , et al. September 1, 2 | 2015-09-01 |
Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation
App 20150228628 - Pagaila; Reza A. ; et al. | 2015-08-13 |
Integrated circuit packaging system with routable traces and method of manufacture thereof
Grant 9,105,620 - Do , et al. August 11, 2 | 2015-08-11 |
Integrated Circuit Packaging System With Vialess Substrate And Method Of Manufacture Thereof
App 20150179555 - Kim; Sung Soo ; et al. | 2015-06-25 |
Exposed interconnect for a package on package system
Grant 9,059,011 - Pagaila , et al. June 16, 2 | 2015-06-16 |
Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation
Grant 9,048,211 - Pagaila , et al. June 2, 2 | 2015-06-02 |
Integrated circuit packaging system with side solderable leads and method of manufacture thereof
Grant 9,048,228 - Do , et al. June 2, 2 | 2015-06-02 |
Integrated circuit package system employing wafer level chip scale packaging
Grant 9,048,197 - Do , et al. June 2, 2 | 2015-06-02 |
Semiconductor Device and Method of Forming Stepped Interconnect Layer for Stacked Semiconductor Die
App 20150145128 - Pagaila; Reza A. ; et al. | 2015-05-28 |
Integrated circuit packaging system having planar interconnect and method for manufacture thereof
Grant 9,029,205 - Pagaila , et al. May 12, 2 | 2015-05-12 |
Semiconductor Device and Method of Forming a Shielding Layer Between Stacked Semiconductor Die
App 20150115394 - Pagaila; Reza A. ; et al. | 2015-04-30 |
Semiconductor device and method of forming recessed conductive vias in saw streets
Grant 9,006,882 - Pagaila , et al. April 14, 2 | 2015-04-14 |
Integrated Circuit Packaging System With Side Solderable Leads And Method Of Manufacture Thereof
App 20150084172 - Do; Byung Tai ; et al. | 2015-03-26 |
Integrated circuit packaging system with molded grid-array mechanism and method of manufacture thereof
Grant 8,987,064 - Do , et al. March 24, 2 | 2015-03-24 |
Semiconductor package with penetrable encapsulant joining semiconductor die and method thereof
Grant 8,963,309 - Do , et al. February 24, 2 | 2015-02-24 |
Integrated circuit packaging system with thermal structures and method of manufacture thereof
Grant 8,963,320 - Do , et al. February 24, 2 | 2015-02-24 |
Integrated circuit packaging system with heat shield and method of manufacture thereof
Grant 8,962,393 - Pagaila , et al. February 24, 2 | 2015-02-24 |
Integrated circuit packaging system with thermal emission and method of manufacture thereof
Grant 8,957,509 - Do , et al. February 17, 2 | 2015-02-17 |
Semiconductor device and method of forming stepped interconnect layer for stacked semiconductor die
Grant 8,946,870 - Pagaila , et al. February 3, 2 | 2015-02-03 |
Through hole vias at saw streets including protrusions or recesses for interconnection
Grant 8,940,636 - Pagaila , et al. January 27, 2 | 2015-01-27 |
Integrated circuit packaging system with trenched leadframe and method of manufacture thereof
Grant 8,937,379 - Do , et al. January 20, 2 | 2015-01-20 |
Semiconductor Device and Method of Using Substrate With Conductive Posts and Protective Layers to Form Embedded Sensor Die Package
App 20150001707 - Do; Byung Tai ; et al. | 2015-01-01 |
Semiconductor device and method of forming a shielding layer between stacked semiconductor die
Grant 8,907,498 - Pagaila , et al. December 9, 2 | 2014-12-09 |
Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant
App 20140353846 - Chua; Linda Pei Ee ; et al. | 2014-12-04 |
Leadless package system having external contacts
Grant 8,878,361 - Do , et al. November 4, 2 | 2014-11-04 |
Coreless Integrated Circuit Packaging System And Method Of Manufacture Thereof
App 20140284791 - Do; Byung Tai ; et al. | 2014-09-25 |
Integrated circuit packaging system with leadframe lead array routing and method of manufacture thereof
Grant 8,841,173 - Do , et al. September 23, 2 | 2014-09-23 |
Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant
Grant 8,823,182 - Chua , et al. September 2, 2 | 2014-09-02 |
Method of fabricating semiconductor die with through-hole via on saw streets and through-hole via in active area of die
Grant 8,815,643 - Do , et al. August 26, 2 | 2014-08-26 |
Integrated circuit packaging system with plated leads and method of manufacture thereof
Grant 8,809,119 - Espiritu , et al. August 19, 2 | 2014-08-19 |
Integrated circuit packaging system with leads and method of manufacture thereof
Grant 8,802,500 - Do , et al. August 12, 2 | 2014-08-12 |
Integrated circuit packaging system with island terminals and method of manufacture thereof
Grant 8,802,501 - Camacho , et al. August 12, 2 | 2014-08-12 |
Semiconductor Device and Method of Forming Conductive Vias with Trench in Saw Street
App 20140217609 - Do; Byung Tai ; et al. | 2014-08-07 |
Integrated circuit packaging system with routable circuitry and method of manufacture thereof
Grant 8,791,556 - Do , et al. July 29, 2 | 2014-07-29 |
Semiconductor Device and Method of Providing Z-Interconnect Conductive Pillars with Inner Polymer Core
App 20140203443 - Pagaila; Reza A. ; et al. | 2014-07-24 |
Integrated Circuit Packaging System With Molded Grid-array Mechanism And Method Of Manufacture Thereof
App 20140197548 - Do; Byung Tai ; et al. | 2014-07-17 |
Extended Redistribution Layers Bumped Wafer
App 20140197540 - Do; Byung Tai ; et al. | 2014-07-17 |
Integrated circuit mounting system with paddle interlock and method of manufacture thereof
Grant 8,779,565 - Han , et al. July 15, 2 | 2014-07-15 |
Integrated circuit package system with encapsulation lock
Grant 8,779,568 - Do , et al. July 15, 2 | 2014-07-15 |
Integrated circuit packaging system with electrical interface and method of manufacture thereof
Grant 8,759,159 - Do , et al. June 24, 2 | 2014-06-24 |
Integrated circuit package system with offset stacked die
Grant 8,759,954 - Do , et al. June 24, 2 | 2014-06-24 |
Integrated Circuit Packaging System With Routable Grid Array Lead Frame
App 20140165389 - DO; Byung Tai ; et al. | 2014-06-19 |
Integrated Circuit Packaging System With Transferable Trace Lead Frame
App 20140167236 - DO; Byung Tai ; et al. | 2014-06-19 |
Semiconductor device and method of providing Z-interconnect conductive pillars with inner polymer core
Grant 8,742,579 - Pagaila , et al. June 3, 2 | 2014-06-03 |
Integrated circuit packaging system with routed circuit lead array and method of manufacture thereof
Grant 8,735,224 - Do , et al. May 27, 2 | 2014-05-27 |
Semiconductor device and method of forming conductive vias with trench in saw street
Grant 8,729,694 - Do , et al. May 20, 2 | 2014-05-20 |
Semiconductor package having semiconductor die with internal vertical interconnect structure and method therefor
Grant 8,723,305 - Do , et al. May 13, 2 | 2014-05-13 |
Extended redistribution layers bumped wafer
Grant 8,716,853 - Do , et al. May 6, 2 | 2014-05-06 |
Semiconductor device and method of forming conductive TSV with insulating annular ring
Grant 8,703,610 - Pagaila , et al. April 22, 2 | 2014-04-22 |
Integrated circuit packaging system with die paddle and method of manufacture thereof
Grant 8,669,654 - Do , et al. March 11, 2 | 2014-03-11 |
Integrated circuit packaging system with formed interconnects and method of manufacture thereof
Grant 8,658,470 - Do , et al. February 25, 2 | 2014-02-25 |
Semiconductor device and method of shielding semiconductor die from inter-device interference
Grant 8,648,448 - Pagaila , et al. February 11, 2 | 2014-02-11 |
Integrated circuit packaging system with interconnect and method of manufacture thereof
Grant 8,633,059 - Do , et al. January 21, 2 | 2014-01-21 |
Integrated circuit packaging system with pad connection and method of manufacture thereof
Grant 8,633,063 - Do , et al. January 21, 2 | 2014-01-21 |
Integrated circuit packaging system with contacts and method of manufacture thereof
Grant 8,629,567 - Do , et al. January 14, 2 | 2014-01-14 |
Integrated Circuit Packaging System With Grid-array Mechanism And Method Of Manufacture Thereof
App 20140008774 - Do; Byung Tai ; et al. | 2014-01-09 |
Semiconductor Device and Method of Forming Cavity Adjacent to Sensitive Region of Semiconductor Die Using Wafer-Level Underfill Material
App 20140008769 - Pagaila; Reza A. ; et al. | 2014-01-09 |
Integrated circuit packaging system with grid-array mechanism and method of manufacture thereof
Grant 8,623,708 - Do , et al. January 7, 2 | 2014-01-07 |
Integrated circuit packaging system with package-on-package and method of manufacture thereof
Grant 8,623,711 - Do , et al. January 7, 2 | 2014-01-07 |
Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation
App 20140001627 - Pagaila; Reza A. ; et al. | 2014-01-02 |
Semiconductor device and method of forming through vias with reflowed conductive material
Grant 8,592,950 - Pagaila , et al. November 26, 2 | 2013-11-26 |
Ultra-thin wafer system and method of manufacture thereof
Grant 8,592,286 - Kuan , et al. November 26, 2 | 2013-11-26 |
Semiconductor Device and Method of Forming Penetrable Film Encapsulant Around Semiconductor Die and Interconnect Structure
App 20130299971 - Do; Byung Tai ; et al. | 2013-11-14 |
Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material
App 20130299975 - Pagaila; Reza A. ; et al. | 2013-11-14 |
Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant
App 20130292850 - Chua; Linda Pei Ee ; et al. | 2013-11-07 |
Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material
Grant 8,574,960 - Pagaila , et al. November 5, 2 | 2013-11-05 |
Semiconductor device and method of embedding thermally conductive layer in interconnect structure for heat dissipation
Grant 8,575,769 - Pagaila , et al. November 5, 2 | 2013-11-05 |
Integrated circuit packaging system with encapsulation and leadframe etching and method of manufacture thereof
Grant 8,569,112 - Do , et al. October 29, 2 | 2013-10-29 |
Apparatus for thermally enhanced semiconductor package
Grant 8,557,639 - Pagaila , et al. October 15, 2 | 2013-10-15 |
Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant
Grant 8,558,392 - Chua , et al. October 15, 2 | 2013-10-15 |
Integrated circuit packaging system with pad connection and method of manufacture thereof
Grant 8,557,638 - Do , et al. October 15, 2 | 2013-10-15 |
Integrated Circuit Packaging System With Routable Circuitry And Method Of Manufacture Thereof
App 20130256861 - Do; Byung Tai ; et al. | 2013-10-03 |
Semiconductor package having semiconductor die with internal vertical interconnect structure and method therefor
Grant 8,546,195 - Do , et al. October 1, 2 | 2013-10-01 |
Semiconductor device and method of forming penetrable film encapsulant around semiconductor die and interconnect structure
Grant 8,546,193 - Do , et al. October 1, 2 | 2013-10-01 |
Integrated Circuit Packaging System With Terminals And Method Of Manufacture Thereof
App 20130249077 - Do; Byung Tai ; et al. | 2013-09-26 |
Integrated Circuit Packaging System With A Grid Array With A Leadframe And Method Of Manufacture Thereof
App 20130249118 - Do; Byung Tai ; et al. | 2013-09-26 |
Integrated Circuit Packaging System With Encapsulation And Leadframe Etching And Method Of Manufacture Thereof
App 20130249065 - Do; Byung Tai ; et al. | 2013-09-26 |
Integrated Circuit Packaging System With External Interconnect And Method Of Manufacture Thereof
App 20130249068 - Do; Byung Tai ; et al. | 2013-09-26 |
Semiconductor Device and Method of Forming Base Substrate with Recesses for Capturing Bumped Semiconductor Die
App 20130241030 - Do; Byung Tai ; et al. | 2013-09-19 |
Semiconductor device and method of forming bond wires between semiconductor die contact pads and conductive TOV in peripheral area around semiconductor die
Grant 8,525,344 - Pagaila , et al. September 3, 2 | 2013-09-03 |
Integrated circuit packaging system with leads and method of manufacture thereof
Grant 8,525,325 - Do , et al. September 3, 2 | 2013-09-03 |
Integrated circuit packaging system with lead encapsulation and method of manufacture thereof
Grant 8,519,518 - Do , et al. August 27, 2 | 2013-08-27 |
Package-in-Package Using Through-Hole Via Die on Saw Streets
App 20130214385 - Do; Byung Tai ; et al. | 2013-08-22 |
Integrated circuit packaging system with pad and method of manufacture thereof
Grant 8,513,788 - Do , et al. August 20, 2 | 2013-08-20 |
Integrated circuit package system with shield
Grant 8,507,319 - Chow , et al. August 13, 2 | 2013-08-13 |
Semiconductor device with conductive vias between saw streets
Grant 8,502,352 - Pagaila , et al. August 6, 2 | 2013-08-06 |
Semiconductor device and method of conforming conductive vias between insulating layers in saw streets
Grant 8,501,541 - Pagaila , et al. August 6, 2 | 2013-08-06 |
Integrated circuit package-in-package system with wire-in-film encapsulant and method for manufacturing thereof
Grant 8,492,204 - Do , et al. July 23, 2 | 2013-07-23 |
Semiconductor device and method of forming through vias with reflowed conductive material
Grant 8,492,201 - Pagaila , et al. July 23, 2 | 2013-07-23 |
Integrated circuit system having different-size solder bumps and different-size bonding pads
Grant 8,487,438 - Lin , et al. July 16, 2 | 2013-07-16 |
Semiconductor device and method of forming base substrate with recesses for capturing bumped semiconductor die
Grant 8,476,772 - Do , et al. July 2, 2 | 2013-07-02 |
Integrated Circuit Packaging System With Contacts And Method Of Manufacture Thereof
App 20130154118 - Do; Byung Tai ; et al. | 2013-06-20 |
Integrated Circuit Packaging System With Pad And Method Of Manufacture Thereof
App 20130154072 - Do; Byung Tai ; et al. | 2013-06-20 |
Integrated Circuit Packaging System With Routable Trace And Method Of Manufacture Thereof
App 20130154105 - Do; Byung Tai ; et al. | 2013-06-20 |
Integrated Circuit Packaging System With Package-on-package And Method Of Manufacture Thereof
App 20130154120 - Do; Byung Tai ; et al. | 2013-06-20 |
Integrated Circuit Packaging System With Terminals And Method Of Manufacture Thereof
App 20130154119 - Do; Byung Tai ; et al. | 2013-06-20 |
Integrated Circuit Packaging System With Leads And Method Of Manufacture Thereof
App 20130154080 - Do; Byung Tai ; et al. | 2013-06-20 |
Integrated circuit packaging system with filled vias and method of manufacture thereof
Grant 8,466,057 - Chua , et al. June 18, 2 | 2013-06-18 |
Package-in-package using through-hole via die on saw streets
Grant 8,445,325 - Do , et al. May 21, 2 | 2013-05-21 |
Integrated Circuit Packaging System With Leadframe Lead Array Routing And Method Of Manufacture Thereof
App 20130099365 - Do; Byung Tai ; et al. | 2013-04-25 |
Integrated Circuit Packaging System With Planarity Control And Method Of Manufacture Thereof
App 20130099367 - Do; Byung Tai ; et al. | 2013-04-25 |
Integrated circuit package system with warp-free chip
Grant 8,421,197 - Do , et al. April 16, 2 | 2013-04-16 |
Semiconductor Device and Method of Forming a Shielding Layer Between Stacked Semiconductor Die
App 20130087897 - Pagaila; Reza A. ; et al. | 2013-04-11 |
Semiconductor Device and Method of Forming Conductive TSV With Insulating Annular Ring
App 20130087928 - Pagaila; Reza A. ; et al. | 2013-04-11 |
Integrated Circuit Packaging System With Thermal Structures And Method Of Manufacture Thereof
App 20130087902 - Do; Byung Tai ; et al. | 2013-04-11 |
Non-leaded integrated circuit package system with multiple ground sites
Grant 8,415,778 - Punzalan , et al. April 9, 2 | 2013-04-09 |
Integrated Circuit Packaging System With Heat Shield And Method Of Manufacture Thereof
App 20130075889 - Pagaila; Reza Argenty ; et al. | 2013-03-28 |
Integrated circuit packaging system and method of manufacture thereof
Grant 8,406,004 - Pagaila , et al. March 26, 2 | 2013-03-26 |
Integrated circuit packaging system with package stacking and method of manufacture thereof
Grant 8,404,518 - Do , et al. March 26, 2 | 2013-03-26 |
Semiconductor device and method of forming FO-WLCSP with recessed interconnect area in peripheralregion of semiconductor die
App 20130056867 - Pagaila; Reza A. ; et al. | 2013-03-07 |
Integrated circuit package system with package stand-off and method of manufacture thereof
Grant 8,389,330 - Do , et al. March 5, 2 | 2013-03-05 |
Integrated Circuit Packaging System With Thermal Emission And Method Of Manufacture Thereof
App 20120326284 - Do; Byung Tai ; et al. | 2012-12-27 |
Exposed Interconnect For A Package On Package System
App 20120306078 - Pagaila; Reza Argenty ; et al. | 2012-12-06 |
Integrated Circuit Packaging System With Interconnect And Method Of Manufacture Thereof
App 20120286432 - Do; Byung Tai ; et al. | 2012-11-15 |
Integrated Circuit Packaging System With Electrical Interface And Method Of Manufacture Thereof
App 20120280407 - Do; Byung Tai ; et al. | 2012-11-08 |
Integrated Circuit Packaging System With Pad Connection And Method Of Manufacture Thereof
App 20120280376 - Do; Byung Tai ; et al. | 2012-11-08 |
Semiconductor Die and Method of Forming through Organic Vias having Varying Width in Peripheral Region of the Die
App 20120280402 - Pagaila; Reza A. ; et al. | 2012-11-08 |
Integrated Circuit Packaging System With Pad Connection And Method Of Manufacture Thereof
App 20120280377 - Do; Byung Tai ; et al. | 2012-11-08 |
Semiconductor Die and Method of Forming through Organic Vias having Varying Width in Peripheral Region of the Die
App 20120280403 - Pagaila; Reza A. ; et al. | 2012-11-08 |
Integrated Circuit Packaging System With Formed Interconnects And Method Of Manufacture Thereof
App 20120280408 - Do; Byung Tai ; et al. | 2012-11-08 |
Integrated Circuit Packaging System With Routed Circuit Lead Array And Method Of Manufacture Thereof
App 20120280390 - Do; Byung Tai ; et al. | 2012-11-08 |
Semiconductor Wafer Having Through-Hole Vias on Saw Streets with Backside Redistribution Layer
App 20120273967 - Do; Byung Tai ; et al. | 2012-11-01 |
Semiconductor Device and Method of Providing Common Voltage Bus and Wire Bondable Redistribution
App 20120261817 - Do; Byung Tai ; et al. | 2012-10-18 |
Integrated Circuit Packaging System With Filled Vias And Method Of Manufacture Thereof
App 20120241973 - Chua; Linda Pei Ee ; et al. | 2012-09-27 |
Apparatus for Thermally Enhanced Semiconductor Package
App 20120241939 - Pagaila; Reza A. ; et al. | 2012-09-27 |
Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation
App 20120241940 - Pagaila; Reza A. ; et al. | 2012-09-27 |
Method of Fabricating Semiconductor Die with Through-Hole Via on Saw Streets and Through-Hole Via in Active Area of Die
App 20120244661 - Do; Byung Tai ; et al. | 2012-09-27 |
Semiconductor Device and Method of Forming Bond Wires Between Semiconductor Die Contact Pads and Conductive TOV in Peripheral Area Around Semiconductor Die
App 20120217643 - Pagaila; Reza A. ; et al. | 2012-08-30 |
Integrated Circuit Packaging System With Terminal Locks And Method Of Manufacture Thereof
App 20120205811 - Do; Byung Tai ; et al. | 2012-08-16 |
Semiconductor Device and Method of Forming Vertical Interconnect Structure Using Stud Bumps
App 20120199972 - Pagaila; Reza A. ; et al. | 2012-08-09 |
Package-on-Package Using Through-Hole Via Die on Saw Streets
App 20120199963 - Do; Byung Tai ; et al. | 2012-08-09 |
Semiconductor Device and Method of Forming B-Stage Conductive Polymer over Contact Pads of Semiconductor Die in Fo-WLCSP
App 20120187580 - Do; Byung Tai ; et al. | 2012-07-26 |
Semiconductor Device and Method of Forming Bond Wires and Stud Bumps in Recessed Region of Peripheral Area around the Device for Electrical Interconnection to Other Devices
App 20120181689 - Do; Byung Tai ; et al. | 2012-07-19 |
Semiconductor Device and Method of Stacking Die on Leadframe Electrically Connected by Conductive Pillars
App 20120181673 - Pagaila; Reza A. ; et al. | 2012-07-19 |
Semiconductor Device and Method of Forming Conductive Pillars in Recessed Region of Peripheral Area around the Device for Electrical Interconnection to Other Devices
App 20120175770 - Do; Byung Tai ; et al. | 2012-07-12 |
Semiconductor Device and Method of Providing Z-Interconnect Conductive Pillars with Inner Polymer Core
App 20120153472 - Pagaila; Reza A. ; et al. | 2012-06-21 |
Integrated Circuit Mounting System With Paddle Interlock And Method Of Manufacture Thereof
App 20120146192 - Han; Byung Joon ; et al. | 2012-06-14 |
Semiconductor Device and Method of Forming Base Substrate with Recesses for Capturing Bumped Semiconductor Die
App 20120126429 - Do; Byung Tai ; et al. | 2012-05-24 |
Semiconductor Device and Method of Forming Stepped Interconnect Layer for Stacked Semiconductor Die
App 20120112355 - Pagaila; Reza A. ; et al. | 2012-05-10 |
Semiconductor Device and Method of Mounting Pre-Fabricated Shielding Frame over Semiconductor Die
App 20120112328 - Pagaila; Reza A. ; et al. | 2012-05-10 |
Semiconductor Device and Method of Forming Stepped Interconnect Layer for Stacked Semiconductor Die
App 20120104562 - Pagaila; Reza A. ; et al. | 2012-05-03 |
Integrated Circuit Package System With Encapsulation Lock
App 20120104579 - Do; Byung Tai ; et al. | 2012-05-03 |
Semiconductor Device and Method of Forming Penetrable Film Encapsulant Around Semiconductor Die and Interconnect Structure
App 20120104590 - Do; Byung Tai ; et al. | 2012-05-03 |
Semiconductor Package Having Semiconductor Die with Internal Vertical Interconnect Structure and Method Therefor
App 20120104599 - Do; Byung Tai ; et al. | 2012-05-03 |
Semiconductor Device and Method of Shielding Semiconductor Die from Inter-Device Interference
App 20120104573 - Pagaila; Reza A. ; et al. | 2012-05-03 |
Semiconductor Die and Method of Forming Noise Absorbing Regions Between THVs in Peripheral Region of the Die
App 20120091567 - Pagaila; Reza A. ; et al. | 2012-04-19 |
Semiconductor Package Having Semiconductor Die with Internal Vertical Interconnect Structure and Method Therefor
App 20120094444 - Do; Byung Tai ; et al. | 2012-04-19 |
Integrated Circuit Packaging System With Lead Encapsulation And Method Of Manufacture Thereof
App 20120074547 - Do; Byung Tai ; et al. | 2012-03-29 |
Semiconductor device and method of forming conductive TSV with insulating annular ring
App 20120068313 - Pagaila; Reza A. ; et al. | 2012-03-22 |
Integrated Circuit Packaging System With Film Encapsulation And Method Of Manufacture Thereof
App 20120061855 - Do; Byung Tai ; et al. | 2012-03-15 |
Semiconductor Device and Method of Forming B-Stage Conductive Polymer Over Contact Pads of Semiconductor Die in FO-WLCSP
App 20120038047 - Do; Byung Tai ; et al. | 2012-02-16 |
Integrated Circuit Packaging System With Die Paddle And Method Of Manufacture Thereof
App 20120032315 - Do; Byung Tai ; et al. | 2012-02-09 |
Through Hole Vias at Saw Streets Including Protrusions or Recesses for Interconnection
App 20120034777 - Pagaila; Reza A. ; et al. | 2012-02-09 |
Semiconductor Device and Method of Conforming Conductive Vias Between Insulating Layers in Saw Streets
App 20120018899 - Pagaila; Reza A. ; et al. | 2012-01-26 |
Semiconductor Device and Method of Conforming Conductive Vias Between Insulating Layers in Saw Streets
App 20120018900 - Pagaila; Reza A. ; et al. | 2012-01-26 |
Integrated Circuit Packaging System With Island Terminals And Method Of Manufacture Thereof
App 20120018866 - Camacho; Zigmund Ramirez ; et al. | 2012-01-26 |
Integrated Circuit Packaging System With Molded Interconnects And Method Of Manufacture Thereof
App 20110316163 - Do; Byung Tai ; et al. | 2011-12-29 |
Integrated Circuit Package System With Package Stand-off And Method Of Manufacture Thereof
App 20110316133 - Do; Byung Tai ; et al. | 2011-12-29 |
Apparatus for Thermally Enhanced Semiconductor Package
App 20110298120 - Pagaila; Reza A. ; et al. | 2011-12-08 |
Non-leaded Integrated Circuit Package System With Multiple Ground Sites
App 20110298108 - Punzalan; Jeffrey D. ; et al. | 2011-12-08 |
Integrated Circuit Package System With Offset Stacked Die
App 20110284998 - Do; Byung Tai ; et al. | 2011-11-24 |
Leadless Package System Having External Contacts
App 20110285002 - Do; Byung Tai ; et al. | 2011-11-24 |
Semiconductor Device and Method of Forming Interconnect Structure and Mounting Semiconductor Die in Recessed Encapsulant
App 20110278741 - Chua; Linda Pei Ee ; et al. | 2011-11-17 |
Semiconductor Package with Penetrable Encapsulant Joining Semiconductor Die and Method Thereof
App 20110266652 - Do; Byung Tai ; et al. | 2011-11-03 |
Semiconductor Device and Method of Forming Conductive Vias with Trench in Saw Street
App 20110254173 - Do; Byung Tai ; et al. | 2011-10-20 |
Integrated Circuit Packaging System With Mountable Inward And Outward Interconnects And Method Of Manufacture Thereof
App 20110256664 - Pagaila; Reza Argenty ; et al. | 2011-10-20 |
Integrated Circuit Packaging System And Method Of Manufacture Thereof
App 20110201153 - Pagaila; Reza Argenty ; et al. | 2011-08-18 |
Semiconductor Device and Method of Forming Cavity Adjacent to Sensitive Region of Semiconductor Die Using Wafer-Level Underfill Material
App 20110187005 - Pagaila; Reza A. ; et al. | 2011-08-04 |
Integrated Circuit Package-in-package System With Wire-in-film Encapsulant And Method For Manufacturing Thereof
App 20110180914 - Do; Byung Tai ; et al. | 2011-07-28 |
Integrated Circuit Packaging System Having Planar Interconnect And Method For Manufacture Thereof
App 20110156275 - Pagaila; Reza Argenty ; et al. | 2011-06-30 |
Integrated Circuit Packaging System With Package Stacking And Method Of Manufacture Thereof
App 20110140258 - Do; Byung Tai ; et al. | 2011-06-16 |
Integrated Circuit Package System For Electromagnetic Isolation And Method For Manufacturing Thereof
App 20110133316 - Huang; Rui ; et al. | 2011-06-09 |
Structure for Bumped Wafer Test
App 20110121295 - Kuan; Francis Heap Hoe ; et al. | 2011-05-26 |
Integrated Circuit Package System With Warp-free Chip
App 20110121466 - Do; Byung Tai ; et al. | 2011-05-26 |
Method of Fabricating Semiconductor Die with Through-Hole Via on Saw Streets and Through-Hole Via in Active Area of Die
App 20110124156 - Do; Byung Tai ; et al. | 2011-05-26 |
Integrated Circuit Packaging System With Leads And Method Of Manufacture Thereof
App 20110108969 - Do; Byung Tai ; et al. | 2011-05-12 |
Semiconductor Wafer Having Through-Hole Vias on Saw Streets With Backside Redistribution Layer
App 20110111591 - Do; Byung Tai ; et al. | 2011-05-12 |
Integrated Circuit Packaging System With Package Stacking And Method Of Manufacture Thereof
App 20110068478 - Pagaila; Reza Argenty ; et al. | 2011-03-24 |
Semiconductor Device and Method of Stacking Die on Leadframe Electrically Connected by Conductive Pillars
App 20110042798 - Pagaila; Reza A. ; et al. | 2011-02-24 |
Drop-mold Conformable Material As An Encapsulation For An Integrated Circuit Package System And Method For Manufacturing Thereof
App 20110037152 - Do; Byung Tai ; et al. | 2011-02-17 |
Semiconductor Device and Method of Embedding Thermally Conductive Layer in Interconnect Structure for Heat Dissipation
App 20110018114 - Pagaila; Reza A. ; et al. | 2011-01-27 |
Semiconductor Device and Method of Forming Conductive TSV in Peripheral Region of Die Prior to Wafer Singulaton
App 20110014746 - Do; Byung Tai ; et al. | 2011-01-20 |
Integrated Circuit Packaging System With Through Via Die Having Pedestal And Recess And Method Of Manufacture Thereof
App 20100320601 - Pagaila; Reza Argenty ; et al. | 2010-12-23 |
Integrated Circuit Packaging System With Inward And Outward Interconnects And Method Of Manufacture Thereof
App 20100320582 - Pagaila; Reza Argenty ; et al. | 2010-12-23 |
Semiconductor Device and Method of Forming Conductive Vias with Trench in Saw Street
App 20100317153 - Do; Byung Tai ; et al. | 2010-12-16 |
Semiconductor Device and Method of Forming Conductive Pillars in Recessed Region of Peripheral Area Around the Device for Electrical Interconnection to Other Devices
App 20100270656 - Do; Byung Tai ; et al. | 2010-10-28 |
Semiconductor Device Having Electrical Devices Mounted to IPD Structure and Method of Shielding Electromagnetic Interference
App 20100270661 - Pagaila; Reza A. ; et al. | 2010-10-28 |
Integrated Circuit Packaging System With Package Stacking And Method Of Manufacture Thereof
App 20100244219 - Pagaila; Reza Argenty ; et al. | 2010-09-30 |
Integrated Circuit Packaging System With Interposer And Method Of Manufacture Thereof
App 20100244024 - Do; Byung Tai ; et al. | 2010-09-30 |
Integrated Circuit Packaging System With Z-interconnects Having Traces And Method Of Manufacture Thereof
App 20100244232 - Pagaila; Reza Argenty ; et al. | 2010-09-30 |
Semiconductor Device and Method of Forming a Shielding Layer Between Stacked Semiconductor Die
App 20100244208 - Pagaila; Reza A. ; et al. | 2010-09-30 |
Semiconductor Device and Method of Providing Z-Interconnect Conductive Pillars with Inner Polymer Core
App 20100237495 - Pagaila; Reza A. ; et al. | 2010-09-23 |
Semiconductor Device and Method of Mounting Pre-Fabricated Shielding Frame over Semiconductor Die
App 20100237477 - Pagaila; Reza A. ; et al. | 2010-09-23 |
Semiconductor Die and Method of Forming Through Organic Vias Having Varying Width in Peripheral Region of the Die
App 20100237471 - Pagaila; Reza A. ; et al. | 2010-09-23 |
Semiconductor Die and Method of Forming Noise Absorbing Regions Between THVS in Peripheral Region of the Die
App 20100230822 - Pagaila; Reza A. ; et al. | 2010-09-16 |
Semiconductor Device and Method of Stacking Same Size Semiconductor Die Electrically Connected Through Conductive Via Formed Around Periphery of the Die
App 20100233852 - Do; Byung Tai ; et al. | 2010-09-16 |
Integrated Circuit Packaging System With Stacked Die And Method Of Manufacture Thereof
App 20100225007 - Pagaila; Reza Argenty ; et al. | 2010-09-09 |
Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material
App 20100216281 - Pagaila; Reza A. ; et al. | 2010-08-26 |
Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material
App 20100213618 - Pagaila; Reza A. ; et al. | 2010-08-26 |
Integrated Circuit Package System With Offset Stacked Die
App 20100193926 - Do; Byung Tai ; et al. | 2010-08-05 |
Package-on-Package Using Through-Hole Via Die on Saw Streets
App 20100193931 - Do; Byung Tai ; et al. | 2010-08-05 |
Integrated Circuit Packaging System For Fine Pitch Substrates And Method Of Manufacture Thereof
App 20100155926 - Do; Byung Tai ; et al. | 2010-06-24 |
Semiconductor Device and Method of Forming Recessed Conductive Vias in Saw Streets
App 20100155922 - Pagaila; Reza A. ; et al. | 2010-06-24 |
Integrated Circuit Package System Employing Wafer Level Chip Scale Packaging
App 20100148355 - Do; Byung Tai ; et al. | 2010-06-17 |
Integrated Circuit Packaging System Having Through Silicon Vias With Partial Depth Metal Fill Regions And Method Of Manufacture Thereof
App 20100148336 - Do; Byung Tai ; et al. | 2010-06-17 |
Semiconductor Device and Method of Forming Conductive Pillars in Recessed Region of Peripheral Area Around the Device for Electrical Interconnection to Other Devices
App 20100140795 - Do; Byung Tai ; et al. | 2010-06-10 |
Integrated Circuit Packaging System And Method Of Manufacture Thereof
App 20100140813 - Pagaila; Reza Argenty ; et al. | 2010-06-10 |
Integrated Circuit Packaging System Having Asymmetric Encapsulation Structures And Method Of Manufacture Thereof
App 20100140770 - Pagaila; Reza Argenty ; et al. | 2010-06-10 |
Semiconductor Device and Method of Forming Bond Wires and Stud Bumps in Recessed Region of Peripheral Area Around the Device for Electrical Interconnection to Other Devices
App 20100140783 - Do; Byung Tai ; et al. | 2010-06-10 |
Extended Redistribution Layers Bumped Wafer
App 20100140799 - Do; Byung Tai ; et al. | 2010-06-10 |
Integrated Circuit Packaging System And Method Of Manufacture Thereof
App 20100142174 - Pagaila; Reza Argenty ; et al. | 2010-06-10 |
Integrated Circuit Packaging System With Interposer And Flip Chip And Method Of Manufacture Thereof
App 20100133534 - Do; Byung Tai ; et al. | 2010-06-03 |
Integrated Circuit Package System With Encapsulation Lock And Method Of Manufacture Thereof
App 20100117205 - Do; Byung Tai ; et al. | 2010-05-13 |
Semiconductor Device and Method of Forming Double-Sided Through Vias in Saw Streets
App 20100102456 - Pagaila; Reza A. ; et al. | 2010-04-29 |
Semiconductor Device and Method of Forming Stepped-Down RDL and Recessed THV in Peripheral Region of the Device
App 20100096731 - Do; Byung Tai ; et al. | 2010-04-22 |
Integrated Circuit Package System With Adhesive Segment Spacer
App 20100072630 - Chua; Linda Pei Ee ; et al. | 2010-03-25 |
Integrated Circuit Packaging System Having Planar Interconnect
App 20100072596 - Pagaila; Reza Argenty ; et al. | 2010-03-25 |
Semiconductor Device and Method of Forming Embedded Passive Circuit Elements Interconnected to Through Hole Vias
App 20100072570 - Pagaila; Reza A. ; et al. | 2010-03-25 |
Triple Tier Package On Package System
App 20100032821 - Pagaila; Reza Argenty ; et al. | 2010-02-11 |
Exposed Interconnect For A Package On Package System
App 20100033941 - Pagaila; Reza Argenty ; et al. | 2010-02-11 |
Rdl Patterning With Package On Package System
App 20100025833 - Pagaila; Reza Argenty ; et al. | 2010-02-04 |
Semiconductor Device and Method of Forming Shielding Along a Profile Disposed in Peripheral Region Around the Device
App 20100019359 - Pagaila; Reza A. ; et al. | 2010-01-28 |
Semiconductor Device And Method Of Forming Stepped-down Rdl And Recessed Thv In Peripheral Region Of The Device
App 20100007029 - Do; Byung Tai ; et al. | 2010-01-14 |
Method Of Manufacture For Semiconductor Package With Flow Controller
App 20100009468 - Chow; Seng Guan ; et al. | 2010-01-14 |
Integrated Circuit Package System With Supported Stacked Die
App 20100001391 - Do; Byung Tai ; et al. | 2010-01-07 |
Integrated Circuit Package System Stackable Devices
App 20090321899 - Do; Byung Tai ; et al. | 2009-12-31 |
Conformal Shielding Integrated Circuit Package System
App 20090321898 - Pagaila; Reza Argenty ; et al. | 2009-12-31 |
Method and Apparatus for Thermally Enhanced Semiconductor Package
App 20090302445 - Pagaila; Reza A. ; et al. | 2009-12-10 |
Semiconductor Device and Method of Shielding Semiconductor Die from Inter-Device Interference
App 20090302435 - Pagaila; Reza A. ; et al. | 2009-12-10 |
Semiconductor Device Having Electrical Devices Mounted to IPD Structure and Method of Shielding Electromagnetic Interference
App 20090302439 - Pagaila; Reza A. ; et al. | 2009-12-10 |
Semiconductor device and method of forming recessed conductive vias in saw streets
App 20090302478 - Pagaila; Reza A. ; et al. | 2009-12-10 |
Semiconductor Device and Method of Forming Double-Sided Through Vias in Saw Streets
App 20090294911 - Pagaila; Reza A. ; et al. | 2009-12-03 |
Semiconductor Device And Method Of Forming Embedded Passive Circuit Elements Interconnected To Through Hole Vias
App 20090294899 - Pagaila; Reza A. ; et al. | 2009-12-03 |
Semiconductor Device and Method of Forming Through Vias with Reflowed Conductive Material
App 20090294914 - Pagaila; Reza A. ; et al. | 2009-12-03 |
Semiconductor Package Having Through-Hole Vias on Saw Streets Formed with Partial Saw
App 20090291527 - Do; Byung Tai ; et al. | 2009-11-26 |
Semiconductor Package Having Through-Hole Vias on Saw Streets Formed with Partial Saw
App 20090291528 - Do; Byung Tai ; et al. | 2009-11-26 |
Semiconductor Package Having Through-Hole Vias on Saw Streets Formed with Partial Saw
App 20090291526 - Do; Byung Tai ; et al. | 2009-11-26 |
Semiconductor Device and Method of Conforming Conductive Vias Between Insulating Layers in Saw Streets
App 20090283870 - Pagaila; Reza A. ; et al. | 2009-11-19 |
Integrated Circuit Package System With Slotted Die Paddle And Method Of Manufacture Thereof
App 20090283893 - Do; Byung Tai ; et al. | 2009-11-19 |
Through-Hole Via on Saw Streets
App 20090267236 - Do; Byung Tai ; et al. | 2009-10-29 |
Semiconductor Device and Method of Forming Vertical Interconnect Structure Using Stud Bumps
App 20090261466 - Pagaila; Reza A. ; et al. | 2009-10-22 |
Integrated Circuit Solder Bumping System
App 20090250813 - Lin; Yaojian ; et al. | 2009-10-08 |
Through Hole Vias at Saw Streets Including Protrusions or Recesses for Interconnection
App 20090243045 - Pagaila; Reza A. ; et al. | 2009-10-01 |
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