loadpatents
name:-0.0083029270172119
name:-0.01092791557312
name:-0.0004429817199707
Djaja; Gregory Patent Filings

Djaja; Gregory

Patent Applications and Registrations

Patent applications and USPTO patent grants for Djaja; Gregory.The latest application filed is for "scalable serializer".

Company Profile
0.12.8
  • Djaja; Gregory - Phoenix AZ
  • Djaja; Gregory - Tempe AZ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Scalable serializer
Grant 9,143,164 - Chen , et al. September 22, 2
2015-09-22
Hysteresis-based latch design for improved soft error rate with low area/performance overhead
Grant 8,723,548 - Chandrasekharan , et al. May 13, 2
2014-05-13
Scalable Serializer
App 20130328704 - Chen; Hua-Feng ;   et al.
2013-12-12
Hysteresis-Based Latch Design for Improved Soft Error Rate with Low Area/Performance Overhead
App 20130234753 - Chandrasekharan; Karthik ;   et al.
2013-09-12
Single stage and scalable serializer
Grant 8,514,108 - Chen , et al. August 20, 2
2013-08-20
Single Stage and Scalable Serializer
App 20120299756 - Chen; Hua-Feng ;   et al.
2012-11-29
Data retention flip flop for low power applications
Grant 8,085,076 - Djaja , et al. December 27, 2
2011-12-27
Low leakage data retention flip flop
Grant 8,076,965 - Djaja , et al. December 13, 2
2011-12-13
Data retention flip flop for low power applications
App 20100001774 - Djaja; Gregory ;   et al.
2010-01-07
Low leakage data retention flip flop
App 20090256608 - Djaja; Gregory ;   et al.
2009-10-15
Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
Grant 6,903,996 - Slamowitz , et al. June 7, 2
2005-06-07
Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
App 20030099148 - Slamowitz, Mark ;   et al.
2003-05-29
Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
Grant 6,519,204 - Slamowitz , et al. February 11, 2
2003-02-11
Very small swing high performance CMOS static memory (multi-port register file) with power reducing column multiplexing scheme
App 20020071333 - Slamowitz, Mark ;   et al.
2002-06-13
Memory compiler interface and methodology
Grant 6,405,160 - Djaja , et al. June 11, 2
2002-06-11
CMOS driver using output feedback pre-drive
Grant 5,381,055 - Lai , et al. January 10, 1
1995-01-10
Method for optimization of digital circuit delays
Grant 5,359,535 - Djaja , et al. October 25, 1
1994-10-25

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