loadpatents
name:-0.013832807540894
name:-0.011447906494141
name:-0.005950927734375
DITTES; Marc Patent Filings

DITTES; Marc

Patent Applications and Registrations

Patent applications and USPTO patent grants for DITTES; Marc.The latest application filed is for "package stacking using chip to wafer bonding".

Company Profile
6.9.11
  • DITTES; Marc - Regensburg DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Package Stacking Using Chip To Wafer Bonding
App 20220108976 - SEIDEMANN; Georg ;   et al.
2022-04-07
Package stacking using chip to wafer bonding
Grant 11,239,199 - Seidemann , et al. February 1, 2
2022-02-01
Integrated circuit packages including an optical redistribution layer
Grant 10,816,742 - Seidemann , et al. October 27, 2
2020-10-27
Semiconductor package having a variable redistribution layer thickness
Grant 10,553,538 - Reingruber , et al. Fe
2020-02-04
Electrical device and a method for forming an electrical device
Grant 10,522,485 - Geissler , et al. Dec
2019-12-31
Vertical wire connections for integrated circuit package
Grant 10,490,527 - Geissler , et al. Nov
2019-11-26
System-in-package devices and methods for forming system-in-package devices
Grant 10,403,609 - Geissler , et al. Sep
2019-09-03
Optical Fiber Connection On Package Edge
App 20190121041 - Albers; Sven ;   et al.
2019-04-25
Integrated Circuit Packages Including An Optical Redistribution Layer
App 20190072732 - Seidemann; Georg ;   et al.
2019-03-07
Integrated circuit packages including an optical redistribution layer
Grant 10,209,466 - Seidemann , et al. Feb
2019-02-19
Semiconductor Package Having A Variable Redistribution Layer Thickness
App 20190043800 - REINGRUBER; Klaus Jurgen ;   et al.
2019-02-07
Substrate and method for fabrication thereof
Grant 10,181,439 - Marbella , et al. Ja
2019-01-15
Vertical Wire Connections For Integrated Circuit Package
App 20180374819 - Geissler; Christian ;   et al.
2018-12-27
Electrical device and a method for forming an electrical device
App 20180331053 - GEISSLER; Christian ;   et al.
2018-11-15
Package Stacking Using Chip To Wafer Bonding
App 20180331070 - SEIDEMANN; Georg ;   et al.
2018-11-15
System-in-Package Devices and Methods for Forming System-in-Package Devices
App 20180331080 - Geissler; Christian ;   et al.
2018-11-15
Substrate And Method For Fabrication Thereof
App 20180315692 - Marbella; Carlo ;   et al.
2018-11-01
Semiconductor package having a variable redistribution layer thickness
Grant 10,115,668 - Reingruber , et al. October 30, 2
2018-10-30
Integrated Circuit Packages Including An Optical Redistribution Layer
App 20170285280 - Seidemann; Georg ;   et al.
2017-10-05
Semiconductor Package Having A Variable Redistribution Layer Thickness
App 20170170111 - REINGRUBER; Klaus Jurgen ;   et al.
2017-06-15

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