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Patent applications and USPTO patent grants for Dissegna; Mariano.The latest application filed is for "electrostatic discharge protection circuit".
Patent | Date |
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Electrostatic Discharge Protection Circuit App 20210366896 - Mysore Rajagopal; Krishna Praveen ;   et al. | 2021-11-25 |
Electrostatic discharge protection circuit Grant 11,107,806 - Mysore Rajagopal , et al. August 31, 2 | 2021-08-31 |
Electrostatic discharge protection device Grant 10,861,843 - Dissegna December 8, 2 | 2020-12-08 |
Electrostatic Discharge Protection Circuit App 20200343239 - Mysore Rajagopal; Krishna Praveen ;   et al. | 2020-10-29 |
ESD network comprising variable impedance discharge path Grant 10,763,251 - Rajagopal , et al. Sep | 2020-09-01 |
ESD protection circuit with passive trigger voltage controlled shut-off Grant 10,749,336 - Mysore Rajagopal , et al. A | 2020-08-18 |
High voltage bipolar structure for improved pulse width scalability Grant 10,607,984 - Xiu , et al. | 2020-03-31 |
High Voltage Bipolar Structure for Improved Pulse Width Scalability App 20190304964 - Xiu; Yang ;   et al. | 2019-10-03 |
High voltage bipolar structure for improved pulse width scalability Grant 10,381,342 - Xiu , et al. A | 2019-08-13 |
Esd Network Comprising Variable Impedance Discharge Path App 20190096874 - Rajagopal; Krishna Praveen Mysore ;   et al. | 2019-03-28 |
Electrostatic Discharge Protection Device App 20180175020 - Dissegna; Mariano | 2018-06-21 |
Esd Protection Circuit With Passive Trigger Voltage Controlled Shut-off App 20180152019 - Mysore Rajagopal; Krishna Praveen ;   et al. | 2018-05-31 |
High Voltage Bipolar Structure For Improved Pulse Width Scalability App 20170098643 - XIU; YANG ;   et al. | 2017-04-06 |
Electrostatic discharge protection circuit Grant 8,705,217 - Guedon , et al. April 22, 2 | 2014-04-22 |
Esd Protection Circuit Providing Multiple Protection Levels App 20130285196 - DISSEGNA; MARIANO ;   et al. | 2013-10-31 |
Electrostatic Discharge Protection Circuit App 20100157493 - Guedon; Yannick ;   et al. | 2010-06-24 |
Deep Guard Regions For Reducing Latch-up In Electronics Devices App 20090152587 - CERATI; Lorenzo ;   et al. | 2009-06-18 |
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