Dillon; Michael N.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Dillon; Michael N..The latest application filed is for "basic cell architecture for structured asics".

Company Profile

0.14.9

Dillon; Michael N. - Richfield MN US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Basic cell architecture for structured ASICs Grant 8,429,586 - Venkatraman , et al. April 23, 2	2013-04-23
Basic Cell Architecture For Structured ASICs App 20120175683 - Venkatraman; Ramnath ; et al.	2012-07-12
Basic cell architecture for structured application-specific integrated circuits Grant 8,166,440 - Venkatraman , et al. April 24, 2	2012-04-24
Enhanced power distribution in an integrated circuit Grant 7,760,578 - Vinke , et al. July 20, 2	2010-07-20
Enhanced Power Distribution in an Integrated Circuit App 20100097875 - Vinke; David ; et al.	2010-04-22
Basic cell architecture for structured application-specific integrated circuits Grant 7,404,154 - Venkatraman , et al. July 22, 2	2008-07-22
System and method for mapping logical components to physical locations in an integrated circuit design environment Grant 7,269,803 - Khakzadi , et al. September 11, 2	2007-09-11
Latch-based random access memory (LBRAM) with tri-state banking and contention avoidance Grant 7,233,540 - Vinke , et al. June 19, 2	2007-06-19
Method and apparatus for use of hidden decoupling capacitors in an integrated circuit design Grant 7,231,625 - Dillon , et al. June 12, 2	2007-06-12
Process for designing base platforms for IC design to permit resource recovery and flexible macro placement, base platform for ICs, and process of creating ICs Grant 7,216,323 - Dillon , et al. May 8, 2	2007-05-08
Process for designing base platforms for IC design to permit resource recovery and flexible macro placement, base platform for ICs, and process of creating ICs App 20060095880 - Dillon; Michael N. ; et al.	2006-05-04
Method and apparatus for use of hidden decoupling capacitors in an integrated circuit design App 20060075369 - Dillon; Michael N. ; et al.	2006-04-06
Semiconductor integrated circuit having voltage-down circuit regulator and charge sharing Grant 6,934,171 - Dillon , et al. August 23, 2	2005-08-23
System and method for mapping logical components to physical locations in an integrated circuit design environment App 20050138595 - Khakzadi, Khosro ; et al.	2005-06-23
Chip design command processor App 20050114818 - Khakzadi, Khosro ; et al.	2005-05-26
Semiconductor integrated circuit having voltage-down circuit regulator and charge sharing App 20050068014 - Dillon, Michael N. ; et al.	2005-03-31
Multiple-bit memory latch cell for integrated circuit gate array Grant 6,800,882 - Dillon , et al. October 5, 2	2004-10-05
Multiple-bit Memory Latch Cell For Integrated Circuit Gate Array App 20040169205 - Dillon, Michael N. ; et al.	2004-09-02
Method of using filler metal for implementing changes in an integrated circuit design Grant 6,748,579 - Dillon , et al. June 8, 2	2004-06-08
Method Of Using Filller Metal For Implementing Changes In An Integrated Circuit Design App 20040044983 - Dillon, Michael N. ; et al.	2004-03-04
Method to reduce power bus transients in synchronous integrated circuits Grant 6,559,701 - Dillon May 6, 2	2003-05-06
Standard cell integrated circuit layout definition having functionally uncommitted base cells Grant 6,093,214 - Dillon July 25, 2	2000-07-25

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