Dillon; John B.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Dillon; John B..The latest application filed is for "apparatus and method for pipelined memory operations".
Company Profile
0.32.20
- Dillon; John B. - Washington VA
- Dillon; John B. - Palo Alto CA
- Dillon; John B. - Orlean VA
- Dillon; John B. - late of Palo Alto CA
Patent Activity
| Patent | Date |
|---|---|
| Transceiver with latency alignment circuitry Grant 8,458,426 - Donnelly , et al. June 4, 2 | 2013-06-04 |
| Chip socket assembly and chip file assembly for semiconductor chips Grant 8,096,812 - Perino , et al. January 17, 2 | 2012-01-17 |
| Transceiver with latency alignment circuitry Grant 8,086,812 - Donnelly , et al. December 27, 2 | 2011-12-27 |
| Current control technique Grant 7,352,234 - Garrett, Jr. , et al. April 1, 2 | 2008-04-01 |
| Apparatus and method for pipelined memory operations Grant 7,353,357 - Barth , et al. April 1, 2 | 2008-04-01 |
| Apparatus and Method for Pipelined Memory Operations App 20070140035 - Barth; Richard M. ; et al. | 2007-06-21 |
| Current Control Technique App 20070115043 - Garrett; Billy Wayne JR. ; et al. | 2007-05-24 |
| Transceiver With Latency Alignment Circuitry App 20070118711 - Donnelly; Kevin ; et al. | 2007-05-24 |
| Transceiver With Latency Alignment Circuitry App 20070011426 - Donnelly; Kevin ; et al. | 2007-01-11 |
| Connector with integral transmission line bus Grant RE39,153 - Perino , et al. July 4, 2 | 2006-07-04 |
| Apparatus and method for pipelined memory operations App 20060059299 - Barth; Richard M. ; et al. | 2006-03-16 |
| Chip socket assembly and chip file assembly for semiconductor chips App 20060014402 - Perino; Donald V. ; et al. | 2006-01-19 |
| Apparatus and method for pipelined memory operations Grant 6,963,956 - Barth , et al. November 8, 2 | 2005-11-08 |
| Transceiver with latency alignment circuitry App 20050160247 - Dillon, John B. ; et al. | 2005-07-21 |
| Transceiver with latency alignment circuitry App 20050149685 - Donnelly, Kevin ; et al. | 2005-07-07 |
| System including an integrated circuit memory device having an adjustable output voltage setting App 20050099218 - Garrett, Billy Wayne JR. ; et al. | 2005-05-12 |
| Method of operation in a system having a memory device having an adjustable output voltage setting App 20050083104 - Garrett, Billy Wayne JR. ; et al. | 2005-04-21 |
| Memory system including a memory device having a controlled output driver characteristic Grant 6,870,419 - Garrett, Jr. , et al. March 22, 2 | 2005-03-22 |
| Memory device having an adjustable voltage swing setting App 20050040878 - Garrett, Billy Wayne JR. ; et al. | 2005-02-24 |
| Apparatus and method for pipelined memory operations App 20040193788 - Barth, Richard M. ; et al. | 2004-09-30 |
| Apparatus and method for pipelined memory operations Grant 6,718,431 - Barth , et al. April 6, 2 | 2004-04-06 |
| Transceiver with latency alignment circuitry Grant 6,643,752 - Donnelly , et al. November 4, 2 | 2003-11-04 |
| Chip socket assembly and chip file assembly for semiconductor chips Grant 6,619,973 - Perino , et al. September 16, 2 | 2003-09-16 |
| Memory system including a memory device having a controlled output driver characteristic Grant 6,608,507 - Garrett, Jr. , et al. August 19, 2 | 2003-08-19 |
| Semiconductor controller device having a controlled output driver characteristic Grant 6,556,052 - Garrett, Jr. , et al. April 29, 2 | 2003-04-29 |
| Apparatus for multilevel signaling Grant 6,504,875 - Perino , et al. January 7, 2 | 2003-01-07 |
| Memory system including a memory device having a controlled output driver characteristic App 20020196059 - Garrett, Billy Wayne JR. ; et al. | 2002-12-26 |
| Apparatus for multilevel signaling App 20020186777 - Perino, Donald V. ; et al. | 2002-12-12 |
| Socket for coupling an integrated circuit package to a printed circuit board Grant 6,447,321 - Perino , et al. September 10, 2 | 2002-09-10 |
| Apparatus and method for pipelined memory operations App 20020095560 - Barth, Richard M. ; et al. | 2002-07-18 |
| Semiconductor controller device having a controlled output driver characteristic App 20020070771 - Garrett, Billy Wayne JR. ; et al. | 2002-06-13 |
| Chip socket assembly and chip file assembly for semiconductor chips App 20020055285 - Perino, Donald V. ; et al. | 2002-05-09 |
| Apparatus and method for multilevel signaling Grant 6,359,931 - Perino , et al. March 19, 2 | 2002-03-19 |
| Chip socket assembly and chip file assembly for semiconductor chips App 20020031923 - Perino, Donald V. ; et al. | 2002-03-14 |
| Apparatus and method for pipelined memory operations Grant 6,356,975 - Barth , et al. March 12, 2 | 2002-03-12 |
| Semiconductor memory device having a controlled output driver characteristic App 20020017929 - Garrett, Billy Wayne JR. ; et al. | 2002-02-14 |
| Chip socket assembly and chip file assembly for semiconductor chips App 20020016091 - Perino, Donald V. ; et al. | 2002-02-07 |
| Current control technique Grant 6,294,934 - Garrett, Jr. , et al. September 25, 2 | 2001-09-25 |
| Method and apparatus for joining printed circuit boards Grant 6,234,820 - Perino , et al. May 22, 2 | 2001-05-22 |
| Method and apparatus for synchronizing a control signal Grant 6,205,191 - Portmann , et al. March 20, 2 | 2001-03-20 |
| Chip socket assembly and chip file assembly for semiconductor chips Grant 6,007,357 - Perino , et al. December 28, 1 | 1999-12-28 |
| Apparatus and method for multilevel signaling Grant 6,005,895 - Perino , et al. December 21, 1 | 1999-12-21 |
| Method and apparatus for writing to memory components Grant 5,956,284 - Ware , et al. September 21, 1 | 1999-09-21 |
| Method and apparatus for writing to memory components Grant 5,680,361 - Ware , et al. October 21, 1 | 1997-10-21 |
| Modular bus with single or double parallel termination Grant 5,663,661 - Dillon , et al. September 2, 1 | 1997-09-02 |
| Modular bus with single or double parallel termination Grant 5,578,940 - Dillon , et al. November 26, 1 | 1996-11-26 |
| Dynamic random access memory system Grant 5,511,024 - Ware , et al. April 23, 1 | 1996-04-23 |
| Method and apparatus for implementing refresh in a synchronous DRAM system Grant 5,446,696 - Ware , et al. August 29, 1 | 1995-08-29 |
| Dynamic random access memory system Grant 5,430,676 - Ware , et al. July 4, 1 | 1995-07-04 |
| Method and apparatus for power control in devices Grant 5,337,285 - Ware , et al. August 9, 1 | 1994-08-09 |
| Data processing system emulation in a window with a coprocessor and I/O emulation Grant 5,088,033 - Binkley , et al. February 11, 1 | 1992-02-11 |
| Emulation with display update trapping Grant 4,920,481 - Binkley , et al. April 24, 1 | 1990-04-24 |
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