Diep; Buu Q.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Diep; Buu Q..The latest application filed is for "wafer level package solder barrier used as vacuum getter".

Company Profile

3.14.13

Diep; Buu Q. - Murphy TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of stress relief in anti-reflective coated cap wafers for wafer level packaged infrared focal plane arrays Grant 10,315,918 - Gooch , et al.	2019-06-11
Wafer level package solder barrier used as vacuum getter Grant 10,262,913 - Gooch , et al.	2019-04-16
Wafer Level Package Solder Barrier Used As Vacuum Getter App 20180226309 - Gooch; Roland W. ; et al.	2018-08-09
Wafer level MEMS package including dual seal ring Grant 9,969,610 - Diep , et al. May 15, 2	2018-05-15
Wafer level package solder barrier used as vacuum getter Grant 9,966,320 - Gooch , et al. May 8, 2	2018-05-08
Wafer level MEMS package including dual seal ring Grant 9,771,258 - Diep , et al. September 26, 2	2017-09-26
Hermetically sealed package having stress reducing layer Grant 9,708,181 - Kennedy , et al. July 18, 2	2017-07-18
Wafer Level Mems Package Including Dual Seal Ring App 20170129775 - Diep; Buu Q. ; et al.	2017-05-11
Wafer Level Package Solder Barrier Used As Vacuum Getter App 20170011977 - Gooch; Roland W. ; et al.	2017-01-12
Wafer Level Mems Package Including Dual Seal Ring App 20160376146 - Diep; Buu Q. ; et al.	2016-12-29
Wafer level package solder barrier used as vacuum getter Grant 9,520,332 - Gooch , et al. December 13, 2	2016-12-13
Method Of Stress Relief In Anti-reflective Coated Cap Wafers For Wafer Level Packaged Infrared Focal Plane Arrays App 20160340179 - Gooch; Roland W. ; et al.	2016-11-24
Method of stress relief in anti-reflective coated cap wafers for wafer level packaged infrared focal plane arrays Grant 9,427,776 - Gooch , et al. August 30, 2	2016-08-30
Hermetically Sealed Package Having Stress Reducing Layer App 20160167959 - Kennedy; Adam M. ; et al.	2016-06-16
Hermetically sealed package having stress reducing layer Grant 9,334,154 - Kennedy , et al. May 10, 2	2016-05-10
Hermetically Sealed Package Having Stress Reducing Layer App 20160039665 - Kennedy; Adam M. ; et al.	2016-02-11
Wafer level packaged infrared (IR) focal plane array (FPA) with evanescent wave coupling Grant 9,227,839 - Gooch , et al. January 5, 2	2016-01-05
Wafer Level Packaged Infrared (ir) Focal Plane Array (fpa) With Evanescent Wave Coupling App 20150321905 - Gooch; Roland W. ; et al.	2015-11-12
Wafer Level Package Solder Barrier Used As Vacuum Getter App 20150279755 - Gooch; Roland W. ; et al.	2015-10-01
Reducing formation of oxide on solder Grant 9,132,496 - Diep , et al. September 15, 2	2015-09-15
Wafer level package solder barrier used as vacuum getter Grant 9,093,444 - Gooch , et al. July 28, 2	2015-07-28
Protecting an optical surface Grant 9,022,584 - Black , et al. May 5, 2	2015-05-05
Reducing Formation Of Oxide On Solder App 20150076216 - Diep; Buu Q. ; et al.	2015-03-19
Wafer Level Package Solder Barrier Used As Vacuum Getter App 20150014854 - Gooch; Roland W. ; et al.	2015-01-15
Method Of Stress Relief In Anti-reflective Coated Cap Wafers For Wafer Level Packaged Infrared Focal Plane Arrays App 20140053966 - Gooch; Roland W. ; et al.	2014-02-27
Protecting An Optical Surface App 20120127579 - Black; Stephen H. ; et al.	2012-05-24

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.