loadpatents
name:-0.0027401447296143
name:-0.011829853057861
name:-0.00060009956359863
Dhawan; Sudhir Patent Filings

Dhawan; Sudhir

Patent Applications and Registrations

Patent applications and USPTO patent grants for Dhawan; Sudhir.The latest application filed is for "preventing propagation of hardware viruses in a computing system".

Company Profile
0.12.5
  • Dhawan; Sudhir - Austin TX
  • Dhawan; Sudhir - US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Preventing propagation of hardware viruses in a computing system
Grant 9,251,346 - Dasari , et al. February 2, 2
2016-02-02
Preventing Propagation Of Hardware Viruses In A Computing System
App 20140245445 - Dasari; Shiva R. ;   et al.
2014-08-28
Memory initialization time reduction
Grant 8,140,937 - Dasari , et al. March 20, 2
2012-03-20
Memory Initialization Time Reduction
App 20090177946 - Dasari; Shiva R. ;   et al.
2009-07-09
System and method for using hot plug configuration for PCI error recovery
Grant 7,447,934 - Dasari , et al. November 4, 2
2008-11-04
Methods and apparatus for using memory
Grant 7,251,185 - Borkenhagen , et al. July 31, 2
2007-07-31
Apparatus, system, and method for externally invalidating an uncertain cache line
App 20070124543 - Dhawan; Sudhir ;   et al.
2007-05-31
System and method for using hot plug configuration for PCI error recovery
App 20070011500 - Dasari; Shiva R. ;   et al.
2007-01-11
Methods and apparatus for using memory
App 20060187739 - Borkenhagen; John M. ;   et al.
2006-08-24
Method of upgrading and/or servicing memory without interrupting the operation of the system
Grant 6,295,591 - Bealkowski , et al. September 25, 2
2001-09-25
Computer system utilizing front and backside mounted memory controller chipsets
Grant 6,262,890 - Dhawan , et al. July 17, 2
2001-07-17
Cache system using mask bits to recorder the sequences for transfers of data through cache to system memory
Grant 5,491,811 - Arimilli , et al. February 13, 1
1996-02-13
Input/output cache
Grant 5,287,482 - Arimilli , et al. February 15, 1
1994-02-15
Computer system DMA transfer
Grant 5,287,457 - Arimilli , et al. February 15, 1
1994-02-15
Data transfer using bus address lines
Grant 5,274,784 - Arimilli , et al. December 28, 1
1993-12-28
High speed data transfer system which adjusts data transfer speed in response to indicated transfer speed capability of connected device
Grant 5,237,676 - Arimilli , et al. August 17, 1
1993-08-17
Data transfer using bus address lines
Grant 5,109,490 - Arimilli , et al. April 28, 1
1992-04-28

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