Dharne; Shivraj G.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Dharne; Shivraj G..The latest application filed is for "low-leakage sense circuit, memory circuit incorporating the low-leakage sense circuit, and method".
- Dharne; Shivraj G. - Bangalore IN
- Dharne; Shivraj G - Bangalore IN
- Dharne; Shivraj G. - Noida IN
- Dharne; Shivraj G. - Uttarpradesh IN
| Patent | Date |
|---|---|
| Low-leakage Sense Circuit, Memory Circuit Incorporating The Low-leakage Sense Circuit, And Method App 20220215872 - Raj; Vivek ; et al. | 2022-07-07 |
| Single-rail memory circuit with row-specific voltage supply lines and boost circuits Grant 11,322,200 - Raj , et al. May 3, 2 | 2022-05-03 |
| Chaotic wide band frequency modulator for noise reduction Grant 8,421,544 - Saraswat , et al. April 16, 2 | 2013-04-16 |
| Chaotic Wide Band Frequency Modulator For Noise Reduction App 20110135027 - Saraswat; Ruchir ; et al. | 2011-06-09 |
| Compensating a push-pull transmit driver Grant 7,710,163 - Kuttuva , et al. May 4, 2 | 2010-05-04 |
| Compensating A Push-pull Transmit Driver App 20080315923 - Kuttuva; Pradeepkumar S. ; et al. | 2008-12-25 |
| Level shifter Grant 6,954,100 - Dharne , et al. October 11, 2 | 2005-10-11 |
| Glitch removal circuit Grant 6,894,540 - Ali , et al. May 17, 2 | 2005-05-17 |
| Level shifter App 20050057296 - Dharne, Shivraj G. ; et al. | 2005-03-17 |
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