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name:-0.019114971160889
name:-0.031085014343262
name:-0.050450086593628
Devereux; Ian Victor Patent Filings

Devereux; Ian Victor

Patent Applications and Registrations

Patent applications and USPTO patent grants for Devereux; Ian Victor.The latest application filed is for "thread issue control".

Company Profile
1.18.14
  • Devereux; Ian Victor - Cambridge GB
  • Devereux; Ian Victor - Fulbourn GB
  • Devereux; Ian Victor - Cherry Hinton GB
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Multiple GPU graphics processing system
Grant 10,475,147 - Price , et al. Nov
2019-11-12
Thread issue control
Grant 9,753,735 - Engh-Halstvedt , et al. September 5, 2
2017-09-05
Forward pixel killing
Grant 9,619,929 - Devereux , et al. April 11, 2
2017-04-11
Performance of accesses from multiple processors to a same memory location
Grant 9,146,870 - Francis , et al. September 29, 2
2015-09-29
Thread Issue Control
App 20150227376 - ENGH-HALSTVEDT; Andreas Due ;   et al.
2015-08-13
Forward Pixel Killing
App 20150130802 - DEVEREUX; Ian Victor ;   et al.
2015-05-14
Performance Of Accesses From Multiple Processors To A Same Memory Location
App 20150032970 - Francis; Hedley James ;   et al.
2015-01-29
Forming a windowing display in a frame buffer
Grant 8,803,898 - Shreiner , et al. August 12, 2
2014-08-12
Forming a windowing display in a frame buffer
App 20110148892 - Shreiner; David Robert ;   et al.
2011-06-23
Synchronization between pipelines in a data processing apparatus utilizing a synchronization queue
Grant 7,490,221 - Evans , et al. February 10, 2
2009-02-10
Bus transaction management within data processing systems
Grant 7,213,095 - Middleton , et al. May 1, 2
2007-05-01
Synchronising pipelines in a data processing apparatus
Grant 7,024,543 - Grisenthwaite , et al. April 4, 2
2006-04-04
Apparatus and method for facilitating debugging of sequences of processing instructions using context identifier comparison
Grant 7,020,768 - Swaine , et al. March 28, 2
2006-03-28
Early condition code evaluation at pipeline stages generating pass signals for controlling coprocessor pipeline executing same conditional instruction
Grant 6,981,131 - Devereux December 27, 2
2005-12-27
Bus transaction management within data processing systems
App 20050273543 - Middleton, Peter Guy ;   et al.
2005-12-08
Management of caches in a data processing apparatus
Grant 6,954,828 - Devereux October 11, 2
2005-10-11
Entry lockdown within a translation lookaside buffer mechanism
Grant 6,941,442 - Devereux September 6, 2
2005-09-06
Data processing apparatus and method for saving return state
Grant 6,904,517 - Nevill , et al. June 7, 2
2005-06-07
Synchronising pipelines in a data processing apparatus
App 20040054876 - Grisenthwaite, Richard Roy ;   et al.
2004-03-18
Synchronisation between pipelines in a data processing apparatus
App 20040044878 - Evans, Martin Robert ;   et al.
2004-03-04
Evaluation of condition codes in a data processing apparatus
App 20040044884 - Devereux, Ian Victor
2004-03-04
Management of caches in a data processing apparatus
App 20040030836 - Devereux, Ian Victor
2004-02-12
Integrated circuit and method of operation of such a circuit employing serial test scan chains
Grant 6,691,270 - February 10, 2
2004-02-10
Entry lockdown within a translation lookaside buffer mechanism
App 20040024986 - Devereux, Ian Victor
2004-02-05
Management of caches in a data processing apparatus
Grant 6,671,779 - Devereux December 30, 2
2003-12-30
Apparatus and method for facilitating debugging of sequences of processing instructions
App 20020184477 - Swaine, Andrew Brookfield ;   et al.
2002-12-05
Integrated circuit and method of operation of such a circuit
App 20020124216 - Blasco Allue, Conrado ;   et al.
2002-09-05
Data processing apparatus and method for saving return state
App 20020099933 - Nevill, Edward Colles ;   et al.
2002-07-25
Management of caches in a data processing apparatus
App 20020046326 - Devereux, Ian Victor
2002-04-18
Asynchronous first-in-first-out buffer circuit burst mode control
Grant 6,058,439 - Devereux May 2, 2
2000-05-02
Data processing apparatus and method for pre-fetching an instruction in to an instruction cache
Grant 5,961,631 - Devereux , et al. October 5, 1
1999-10-05

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