DeSimone; Craig

Patent Applications and Registrations

Patent applications and USPTO patent grants for DeSimone; Craig.The latest application filed is for "support for multiple widths of dram in double data rate controllers or data buffers".

Company Profile

9.13.8

DeSimone; Craig - Dacula GA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Support for multiple widths of DRAM in double data rate controllers or data buffers Grant 10,956,349 - Gonzalez , et al. March 23, 2	2021-03-23
Command sequence response in a memory data buffer Grant 10,671,300 - DeSimone , et al.	2020-06-02
Support For Multiple Widths Of Dram In Double Data Rate Controllers Or Data Buffers App 20200117629 - Gonzalez; Alejandro F. ; et al.	2020-04-16
Double data rate controllers and data buffers with support for multiple data widths of DRAM Grant 10,565,144 - Gonzalez , et al. Feb	2020-02-18
Compensation of deterministic crosstalk in memory system Grant 10,311,926 - DeSimone	2019-06-04
Nullifying incorrect sampled data contribution in decision feedback equalizer at restart of forwarded clock in memory system Grant 10,311,940 - DeSimone , et al.	2019-06-04
Support For Multiple Widths Of Dram In Double Data Rate Controllers Or Data Buffers App 20190129879 - Gonzalez; Alejandro F. ; et al.	2019-05-02
Command sequence response in a memory data buffer Grant 10,198,200 - DeSimone , et al. Fe	2019-02-05
Asymmetric on-state resistance driver optimized for multi-drop DDR4 Grant 10,171,268 - Yu , et al. J	2019-01-01
Compensation Of Deterministic Crosstalk In Memory System App 20180137903 - DeSimone; Craig	2018-05-17
Nullifying Incorrect Sampled Data Contribution In Decision Feedback Equalizer At Restart Of Forwarded Clock In Memory System App 20180114564 - DeSimone; Craig ; et al.	2018-04-26
Asymmetrical emphasis in a memory data bus driver Grant 9,905,287 - Wang , et al. February 27, 2	2018-02-27
Nullifying incorrect sampled data contribution in decision feedback equalizer at restart of forwarded clock in memory system Grant 9,865,328 - DeSimone , et al. January 9, 2	2018-01-09
Compensation of deterministic crosstalk in memory system Grant 9,865,315 - DeSimone January 9, 2	2018-01-09
Inferring sampled data in decision feedback equalizer at restart of forwarded clock in memory system Grant 9,860,088 - DeSimone , et al. January 2, 2	2018-01-02
Asymmetric On-state Resistance Driver Optimized For Multi-drop Ddr4 App 20170373886 - Yu; Yue ; et al.	2017-12-28
Asymmetric on-state resistance driver optimized for multi-drop DDR4 Grant 9,794,087 - Yu , et al. October 17, 2	2017-10-17
Asymmetric On-state Resistance Driver Optimized For Multi-drop Ddr4 App 20170256303 - Yu; Yue ; et al.	2017-09-07
Asymmetrical Emphasis In A Memory Data Bus Driver App 20170212847 - Wang; Yanbo ; et al.	2017-07-27
Asymmetrical Emphasis In A Memory Data Bus Driver App 20170162251 - Wang; Yanbo ; et al.	2017-06-08
Asymmetrical emphasis in a memory data bus driver Grant 9,653,147 - Wang , et al. May 16, 2	2017-05-16

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