loadpatents
Patent applications and USPTO patent grants for Derbenwick; Gary F.The latest application filed is for "integrated memory device and method of operating same".
Patent | Date |
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Integrated memory device and method of operating same Grant 10,998,030 - Dietrich , et al. May 4, 2 | 2021-05-04 |
Integrated Memory Device and Method of Operating Same App 20180025766 - Dietrich; Daryl G. ;   et al. | 2018-01-25 |
Rectifier utilizing a grounded antenna Grant 7,109,934 - Devilbiss , et al. September 19, 2 | 2006-09-19 |
Method for producing an electrical circuit Grant 7,078,304 - Derbenwick , et al. July 18, 2 | 2006-07-18 |
Encapsulated ferroelectric array Grant 7,053,433 - Derbenwick May 30, 2 | 2006-05-30 |
Method for producing an electrical circuit App 20050181537 - Derbenwick, Gary F. ;   et al. | 2005-08-18 |
Method for producing an electrical circuit Grant 6,900,536 - Derbenwick , et al. May 31, 2 | 2005-05-31 |
Rectifier utilizing a grounded antenna App 20040245858 - Devilbiss, Alan D. ;   et al. | 2004-12-09 |
Rectifier utilizing a grounded antenna App 20040233591 - Devilbiss, Alan D. ;   et al. | 2004-11-25 |
Rectifier utilizing a grounded antenna Grant 6,777,829 - Devilbiss , et al. August 17, 2 | 2004-08-17 |
Apparatus and method for testing ferroelectric memories Grant 6,658,608 - Kamp , et al. December 2, 2 | 2003-12-02 |
Rectifier utilizing a grounded antenna App 20030184163 - DeVilbiss, Alan D. ;   et al. | 2003-10-02 |
Electronic memory with disturb prevention function Grant 6,201,731 - Kamp , et al. March 13, 2 | 2001-03-13 |
Ferroelectric memory with increased switching voltage Grant 6,031,754 - Derbenwick , et al. February 29, 2 | 2000-02-29 |
Process for fabricating layered superlattice materials and AB0.sub.3 type metal oxides without exposure to oxygen at high temperatures Grant 5,962,069 - Schindler , et al. October 5, 1 | 1999-10-05 |
Liquid source formation of thin films using hexamethyl-disilazane Grant 5,849,071 - Derbenwick , et al. December 15, 1 | 1998-12-15 |
Liquid source formation of thin films using hexamethyl-disilazane Grant 5,843,516 - Derbenwick , et al. December 1, 1 | 1998-12-01 |
Zero drain overlap and self aligned contact method for MOS devices Grant 4,486,943 - Ryden , et al. December 11, 1 | 1984-12-11 |
Method of fabricating self-aligned MOS devices and independently formed gate dielectrics and insulating layers Grant 4,397,077 - Derbenwick , et al. August 9, 1 | 1983-08-09 |
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