loadpatents
Patent applications and USPTO patent grants for Delk; Karen Lee.The latest application filed is for "power distribution".
Patent | Date |
---|---|
Power distribution circuitry Grant 11,380,618 - Frederick, Jr. , et al. July 5, 2 | 2022-07-05 |
Power rail stitching technique Grant 11,152,139 - Frederick, Jr. , et al. October 19, 2 | 2021-10-19 |
Power Distribution App 20210167013 - Frederick, JR.; Marlin Wayne ;   et al. | 2021-06-03 |
Power distribution Grant 10,923,425 - Frederick, Jr. , et al. February 16, 2 | 2021-02-16 |
Power Rail Stitching Technique App 20200020464 - Frederick, JR.; Marlin Wayne ;   et al. | 2020-01-16 |
Power grid insertion technique Grant 10,452,803 - Delk Oc | 2019-10-22 |
Power grid healing techniques Grant 10,417,371 - Delk , et al. Sept | 2019-09-17 |
Power Distribution Circuitry App 20190244900 - Frederick, JR.; Marlin Wayne ;   et al. | 2019-08-08 |
Sleep signal stitching technique Grant 10,210,303 - Rao , et al. Feb | 2019-02-19 |
Power Grid Healing Techniques App 20180218107 - Delk; Karen Lee ;   et al. | 2018-08-02 |
Sleep Signal Stitching Technique App 20180218108 - Rao; Ravindra Narayana ;   et al. | 2018-08-02 |
Power Grid Insertion Technique App 20180218106 - Delk; Karen Lee | 2018-08-02 |
Power Distribution App 20180211914 - Frederick, JR.; Marlin Wayne ;   et al. | 2018-07-26 |
Method and apparatus for adjusting a timing derate for static timing analysis Grant 9,892,220 - Frederick, Jr. , et al. February 13, 2 | 2018-02-13 |
Method And Apparatus For Adjusting A Timing Derate For Static Timing Analysis App 20170185709 - FREDERICK, JR.; Marlin Wayne ;   et al. | 2017-06-29 |
Method for adjusting a timing derate for static timing analysis Grant 9,690,889 - Frederick, Jr. , et al. June 27, 2 | 2017-06-27 |
Power grid conductor placement within an integrated circuit Grant 9,653,413 - Frederick, Jr. , et al. May 16, 2 | 2017-05-16 |
Method For Adjusting A Timing Derate For Static Timing Analysis App 20160357894 - FREDERICK, JR.; Marlin Wayne ;   et al. | 2016-12-08 |
Power Grid Conductor Placement Within An Integrated Circuit App 20150371959 - FREDERICK, JR.; Marlin Wayne ;   et al. | 2015-12-24 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.