loadpatents
name:-0.032442092895508
name:-0.031857013702393
name:-0.00076079368591309
Deleonibus; Simon Patent Filings

Deleonibus; Simon

Patent Applications and Registrations

Patent applications and USPTO patent grants for Deleonibus; Simon.The latest application filed is for "method for producing a conductive nanoparticle memory device".

Company Profile
0.25.21
  • Deleonibus; Simon - Claix FR
  • Deleonibus; Simon - La Chanteraie FR
  • Deleonibus; Simon - Grenoble FR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method For Producing A Conductive Nanoparticle Memory Device
App 20140370678 - Deleonibus; Simon ;   et al.
2014-12-18
Method for making electrical interconnections with carbon nanotubes
Grant 8,518,816 - Haumesser , et al. August 27, 2
2013-08-27
Method For Producing A Conductive Nanoparticle Memory Device
App 20130157426 - DELEONIBUS; Simon ;   et al.
2013-06-20
Method for producing a conductive nanoparticle memory device
Grant 8,389,368 - Deleonibus , et al. March 5, 2
2013-03-05
Method For Making Electrical Interconnections With Carbon Nanotubes
App 20120094479 - Haumesser; Paul-Henri ;   et al.
2012-04-19
Method For Producing A Conductive Nanoparticle Memory Device
App 20110033996 - DELEONIBUS; Simon ;   et al.
2011-02-10
Fabrication of active areas of different natures directly onto an insulator: application to the single or double gate MOS transistor
Grant 7,820,523 - Andrieu , et al. October 26, 2
2010-10-26
Method of producing a transistor
Grant 7,678,635 - Clavelier , et al. March 16, 2
2010-03-16
Method for making a vertical MOS transistor with embedded gate
Grant 7,666,733 - Deleonibus February 23, 2
2010-02-23
Field effect transistor with suitable source, drain and channel materials and integrated circuit comprising same
Grant 7,566,922 - Deleonibus July 28, 2
2009-07-28
Method for making a field effect transistor with diamond-like carbon channel and resulting transistor
Grant 7,553,693 - Deleonibus June 30, 2
2009-06-30
Rectangular semi-conducting support for microelectronics and method for making same
Grant 7,466,019 - Deleonibus December 16, 2
2008-12-16
Method for forming patterns aligned on either side of a thin film
Grant 7,425,509 - Vinet , et al. September 16, 2
2008-09-16
Method for delineating a conducting element disposed on an insulating layer, device and transistor thus obtained
Grant 7,425,496 - Deleonibus September 16, 2
2008-09-16
Method Of Producing A Transistor
App 20080200001 - CLAVELIER; Laurent ;   et al.
2008-08-21
Vertical MOS transistor with embedded gate and its fabrication process
App 20080096354 - Deleonibus; Simon
2008-04-24
Rectangular Semi-Conducting Support for Microelectronics and Method for Making Same
App 20080001274 - Deleonibus; Simon
2008-01-03
Fabrication of Active Areas of Different Natures Directly Onto an Insulator: Application to the Single or Double Gate Mos Transistor
App 20070246702 - Andrieu; Francois ;   et al.
2007-10-25
Semiconductor-On-Insulator Substrate Comprising A Buried Diamond-Like Carbon Layer And Method For Making Same
App 20070215941 - Deleonibus; Simon ;   et al.
2007-09-20
Method for Making a Field Effect Transistor with Diamond-Like Carbon Channel and Resulting Transistor
App 20070218600 - Deleonibus; Simon
2007-09-20
Field effect transistor with suitable source, drain and channel materials and integrated circuit comprising same
App 20070187728 - Deleonibus; Simon
2007-08-16
Mis transistor with self-aligned gate and method for making same
App 20070001239 - Deleonibus; Simon
2007-01-04
Method for delineating a conducting element which is disposed on an insulating layer, and device and transistor thus obtained
App 20060172523 - Deleonibus; Simon
2006-08-03
Method for forming patterns aligned on either side of a thin film
App 20060148256 - Vinet; Maud ;   et al.
2006-07-06
Field-effect transistor with horizontal self-aligned gates and the production method therefor
Grant 7,022,562 - Deleonibus April 4, 2
2006-04-04
Processes for making a single election transistor with a vertical channel
Grant 6,998,310 - Fraboulet , et al. February 14, 2
2006-02-14
Damascene architecture electronic storage and method for making same
Grant 6,955,963 - Deleonibus , et al. October 18, 2
2005-10-18
Method for making an electronic component with self-aligned drain and gate, in damascene architecture
Grant 6,867,128 - Deleonibus March 15, 2
2005-03-15
Transistor with an electron and a vertical channel and production methods thereof
App 20040238808 - Fraboulet, David ;   et al.
2004-12-02
Field-effect transistor with horizontal self-aligned gates and the production method therefor
App 20040197977 - Deleonibus, Simon
2004-10-07
Metal source and drain mos transistor
Grant 6,787,845 - Deleonibus September 7, 2
2004-09-07
Method for creating an integrated circuit stage wherein fine and large patterns coexist
Grant 6,727,179 - Deleonibus April 27, 2
2004-04-27
Damascene architecture electronics storage and method for making same
App 20040029345 - Deleonibus, Simon ;   et al.
2004-02-12
Vertical mos transistor with buried gate and method for making same
App 20030132484 - Deleonibus, Simon
2003-07-17
MIS transistor and method for making same on a semiconductor substrate
Grant 6,562,687 - Deleonibus , et al. May 13, 2
2003-05-13
Method for creating an intergrated circuit stage wherein fine and large patterns coexist
App 20030077899 - Deleonibus, Simon
2003-04-24
Metal source and drain mos transistor, and method for making same
App 20030042547 - Deleonibus, Simon
2003-03-06
Method for making an electronic component with self-aligned drain and gate, in damascene architecture
App 20030008496 - Deleonibus, Simon
2003-01-09
Process for manufacturing MIS transistor with self-aligned metal grid
Grant 6,346,450 - Deleonibus , et al. February 12, 2
2002-02-12
Quantum WELL MOS transistor and methods for making same
Grant 6,091,076 - Deleonibus July 18, 2
2000-07-18
MOS transistor and lateral insulating method of a MOS transistor active region
Grant 5,973,365 - Deleonibus October 26, 1
1999-10-26
Process for making a transistor with self-aligned source and drain contacts
Grant 5,913,136 - Deleonibus June 15, 1
1999-06-15
Substrate of the silicon on insulator type for the production of transistors and preparation process for such a substrate
Grant 5,897,939 - Deleonibus April 27, 1
1999-04-27
Method of fabrication of aluminum contacts through a thick insulating layer in an integrated circuit
Grant 4,592,802 - Deleonibus , et al. June 3, 1
1986-06-03

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