Delaney; Maureen A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Delaney; Maureen A..The latest application filed is for "implementation of execution compression of instructions in slice target register file mapper".

Company Profile

2.17.17

Delaney; Maureen A. - Richmond VT
Delaney; Maureen A. - Burlington VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Energy efficient source operand issue Grant 11,150,909 - Brownscheidle , et al. October 19, 2	2021-10-19
Implementation of execution compression of instructions in slice target register file mapper Grant 10,949,205 - Bowman , et al. March 16, 2	2021-03-16
Implementation Of Execution Compression Of Instructions In Slice Target Register File Mapper App 20200201639 - Bowman; Joshua ; et al.	2020-06-25
Operation of a multi-slice processor with selective producer instruction types Grant 10,140,127 - Barrick , et al. Nov	2018-11-27
Operation of a multi-slice processor with selective producer instruction types Grant 10,127,047 - Barrick , et al. November 13, 2	2018-11-13
Techniques to wake-up dependent instructions for back-to-back issue in a microprocessor Grant 10,078,516 - Brownscheidle , et al. September 18, 2	2018-09-18
Operation Of A Multi-slice Processor With Selective Producer Instruction Types App 20180232230 - Barrick; Brian D. ; et al.	2018-08-16
Operation Of A Multi-slice Processor With Selective Producer Instruction Types App 20180232236 - BARRICK; BRIAN D. ; et al.	2018-08-16
Operation of a multi-slice processor implementing a mechanism to overcome a system hang Grant 10,031,757 - Brownscheidle , et al. July 24, 2	2018-07-24
Operation of a multi-slice processor implementing dynamic switching of instruction issuance order Grant 9,983,879 - Brownscheidle , et al. May 29, 2	2018-05-29
Techniques to wake-up dependent instructions for back-to-back issue in a microprocessor Grant 9,971,600 - Brownscheidle , et al. May 15, 2	2018-05-15
Age based fast instruction issue Grant 9,965,286 - Brownscheidle , et al. May 8, 2	2018-05-08
Operation of a multi-slice processor with selective producer instruction types Grant 9,952,874 - Barrick , et al. April 24, 2	2018-04-24
Operation of a multi-slice processor with selective producer instruction types Grant 9,952,861 - Barrick , et al. April 24, 2	2018-04-24
Age based fast instruction issue Grant 9,880,850 - Brownscheidle , et al. January 30, 2	2018-01-30
Age based fast instruction issue Grant 9,870,231 - Brownscheidle , et al. January 16, 2	2018-01-16
Age Based Fast Instruction Issue App 20170322812 - Brownscheidle; Jeffrey C. ; et al.	2017-11-09
Age Based Fast Instruction Issue App 20170269938 - Brownscheidle; Jeffrey C. ; et al.	2017-09-21
Operation Of A Multi-slice Processor Implementing Dynamic Switching Of Instruction Issuance Order App 20170255463 - BROWNSCHEIDLE; JEFFREY C. ; et al.	2017-09-07
Operation Of A Multi-slice Processor Implementing A Mechanism To Overcome A System Hang App 20170235577 - BROWNSCHEIDLE; JEFFREY C. ; et al.	2017-08-17
Operation Of A Multi-slice Processor With Selective Producer Instruction Types App 20170168834 - BARRICK; BRIAN D. ; et al.	2017-06-15
Energy Efficient Source Operand Issue App 20170168830 - Brownscheidle; Jeffrey C. ; et al.	2017-06-15
Operation Of A Multi-slice Processor With Selective Producer Instruction Types App 20170168822 - BARRICK; BRIAN D. ; et al.	2017-06-15
Age Based Fast Instruction Issue App 20170031686 - Brownscheidle; Jeffrey C. ; et al.	2017-02-02
Techniques To Wake-up Dependent Instructions For Back-to-back Issue In A Microprocessor App 20160378504 - BROWNSCHEIDLE; Jeffrey C. ; et al.	2016-12-29
Techniques To Wake-up Dependent Instructions For Back-to-back Issue In A Microprocessor App 20160378503 - BROWNSCHEIDLE; Jeffrey C. ; et al.	2016-12-29
Techniques For Improving Issue Of Instructions With Variable Latencies In A Microprocessor App 20160371091 - BROWNSCHEIDLE; Jeffrey C. ; et al.	2016-12-22
Techniques For Improving Issue Of Instructions With Variable Latencies In A Microprocessor App 20160371090 - Brownscheidle; Jeffrey C. ; et al.	2016-12-22
Age based fast instruction issue Grant 9,389,870 - Brownscheidle , et al. July 12, 2	2016-07-12
Age based fast instruction issue Grant 9,367,322 - Brownscheidle , et al. June 14, 2	2016-06-14
Dependency matrix with reduced area and power consumption Grant 8,127,116 - Islam , et al. February 28, 2	2012-02-28
Dependency Matrix with Reduced Area and Power Consumption App 20100257336 - Islam; Saiful ; et al.	2010-10-07
Method and circuit for reading and writing an instruction buffer Grant 7,243,170 - Buti , et al. July 10, 2	2007-07-10
Method And Circuit For Reading And Writing An Instruction Buffer App 20050114603 - Buti, Taqi N. ; et al.	2005-05-26

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