Dekarske; Clarence W.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Dekarske; Clarence W..The latest application filed is for "storage locking control for a plurality of processors which share a common storage unit".
- Dekarske; Clarence W. - St. Paul Park MN
- DeKarske; Clarence W. - St. Paul MN
| Patent | Date |
|---|---|
| Storage locking control for a plurality of processors which share a common storage unit Grant 4,984,153 - Kregness , et al. January 8, 1 | 1991-01-08 |
| High-speed partitioned set associative cache memory Grant 4,945,512 - DeKarske , et al. July 31, 1 | 1990-07-31 |
| Dual cache RAM for rapid invalidation Grant 4,930,106 - Danilenko , et al. May 29, 1 | 1990-05-29 |
| Programmable data reformat system Grant 4,595,911 - Kregness , et al. June 17, 1 | 1986-06-17 |
| Synchronized selectable rate clocking system Grant 4,560,939 - DeKarske , et al. December 24, 1 | 1985-12-24 |
| Error checked high speed shift matrix Grant 4,556,978 - Kregness , et al. December 3, 1 | 1985-12-03 |
| Paired least recently used block replacement system Grant 4,168,541 - DeKarske September 18, 1 | 1979-09-18 |
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