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name:-0.005119800567627
name:-0.031012058258057
name:-0.0014321804046631
Dean; Mark E. Patent Filings

Dean; Mark E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Dean; Mark E..The latest application filed is for "method and apparatus for constructing, using and reusing components and structures of an artifical neural network".

Company Profile
1.25.6
  • Dean; Mark E. - Jefferson City TN
  • Dean; Mark E. - Tucson AZ
  • Dean; Mark E. - Austin TX
  • Dean; Mark E. - Delray Beach FL
  • Dean; Mark E. - Boynton Beach FL
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus for providing real-time monitoring of an artifical neural network
Grant 10,248,675 - Birdwell , et al.
2019-04-02
Method and apparatus for constructing a dynamic adaptive neural network array (DANNA)
Grant 10,095,718 - Birdwell , et al. October 9, 2
2018-10-09
Method and apparatus for providing random selection and long-term potentiation and depression in an artificial network
Grant 10,055,434 - Birdwell , et al. August 21, 2
2018-08-21
Method and apparatus for constructing, using and reusing components and structures of an artifical neural network
Grant 10,019,470 - Birdwell , et al. July 10, 2
2018-07-10
Method and apparatus for constructing a neuroscience-inspired artificial neural network with visualization of neural pathways
Grant 9,753,959 - Birdwell , et al. September 5, 2
2017-09-05
Method And Apparatus For Providing Real-time Monitoring Of An Artifical Neural Network
App 20150106316 - Birdwell; J. Douglas ;   et al.
2015-04-16
Method And Apparatus For Constructing, Using And Reusing Components And Structures Of An Artifical Neural Network
App 20150106311 - Birdwell; J. Douglas ;   et al.
2015-04-16
Method And Apparatus For Providing Random Selection And Long-term Potentiation And Depression In An Artificial Network
App 20150106315 - Birdwell; J. Douglas ;   et al.
2015-04-16
Method And Apparatus For Constructing A Dynamic Adaptive Neural Network Array (danna)
App 20150106314 - Birdwell; J. Douglas ;   et al.
2015-04-16
Method And Apparatus For Constructing A Neuroscience-inspired Artificial Neural Network With Visualization Of Neural Pathways
App 20150106306 - Birdwell; J. Douglas ;   et al.
2015-04-16
Data storage device for recording to magnetic thread
Grant 7,206,163 - Hellman , et al. April 17, 2
2007-04-17
Data storage device for recording to magnetic thread
App 20060034019 - Hellman; Diana J. ;   et al.
2006-02-16
Method and system in a distributed shared-memory data processing system for determining utilization of shared-memory included within nodes by a designated application
Grant 6,336,170 - Dean , et al. January 1, 2
2002-01-01
Method and system in a distributed shared-memory data processing system for determining utilization of nodes by each executed thread
Grant 6,266,745 - de Backer , et al. July 24, 2
2001-07-24
Method and system for reading from a m-byte memory utilizing a processor having a n-byte data bus
Grant 5,603,041 - Carpenter , et al. February 11, 1
1997-02-11
Self-time processor with dynamic clock generator having plurality of tracking elements for outputting sequencing signals to functional units
Grant 5,553,276 - Dean September 3, 1
1996-09-03
Non-contiguous mapping of I/O addresses to use page protection of a process
Grant 5,548,746 - Carpenter , et al. August 20, 1
1996-08-20
System and method for prefetching information in a processing system
Grant 5,544,342 - Dean August 6, 1
1996-08-06
Microcomputer system employing address offset mechanism to increase the supported cache memory capacity
Grant 5,450,559 - Begun , et al. September 12, 1
1995-09-12
Connecting a short word length non-volatile memory to a long word length address/data multiplexed bus
Grant 5,448,521 - Curry , et al. September 5, 1
1995-09-05
Data processing apparatus for selectively posting write cycles using the 82385 cache controller
Grant 5,327,545 - Begun , et al. * July 5, 1
1994-07-05
Delayed cache write enable circuit for a dual bus microcomputer system with an 80386 and 82385
Grant 5,175,826 - Begun , et al. December 29, 1
1992-12-29
System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration
Grant 5,129,090 - Bland , et al. July 7, 1
1992-07-07
Control of pipelined operation in a microcomputer system employing dynamic bus sizing with 80386 processor and 82385 cache controller
Grant 5,125,084 - Begun , et al. June 23, 1
1992-06-23
Method and apparatus for selectively posting write cycles using the 82385 cache controller
Grant 5,045,998 - Begun , et al. September 3, 1
1991-09-03
Computer system including a page mode memory with decreased access time and method of operation thereof
Grant 5,034,917 - Bland , et al. July 23, 1
1991-07-23
Data processing system including a main processor and a co-processor and co-processor error handling logic
Grant 4,598,356 - Dean , et al. July 1, 1
1986-07-01
Refresh generator system for a dynamic memory
Grant 4,575,826 - Dean March 11, 1
1986-03-11
Microcomputer system with bus control means for peripheral processing devices
Grant 4,528,626 - Dean , et al. July 9, 1
1985-07-09
Composite video color signal generation from digital color signals
Grant 4,442,428 - Dean , et al. April 10, 1
1984-04-10
Color video display system having programmable border color
Grant 4,437,092 - Dean , et al. March 13, 1
1984-03-13

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