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Patent applications and USPTO patent grants for de Rijk; Johannes Hermanus Aloysius.The latest application filed is for "digital phase locked loop arrangement with master clock redundancy".
Patent | Date |
---|---|
Digital phase locked loop arrangement with master clock redundancy Grant 9,595,972 - Milijevic , et al. March 14, 2 | 2017-03-14 |
Digital Phase Locked Loop Arrangement with Master Clock Redundancy App 20160301416 - Milijevic; Slobodan ;   et al. | 2016-10-13 |
Flexible waveform generator with extended range capability Grant 7,728,634 - De Rijk , et al. June 1, 2 | 2010-06-01 |
Digital phase locked loop Grant 7,642,862 - van der Valk , et al. January 5, 2 | 2010-01-05 |
Flexible Waveform Generator With Extended Range Capability App 20090184736 - De Rijk; Johannes Hermanus Aloysius ;   et al. | 2009-07-23 |
Fractional digital PLL Grant 7,557,624 - van der Valk , et al. July 7, 2 | 2009-07-07 |
Fractional Digital Pll App 20080122504 - van der Valk; Robertus Laurentius ;   et al. | 2008-05-29 |
Digital Phase Locked Loop App 20080116982 - van der Valk; Robertus Laurentius ;   et al. | 2008-05-22 |
Flexible decimator Grant 7,096,243 - Van Der Valk , et al. August 22, 2 | 2006-08-22 |
Method of stabilizing phase-locked loop Grant 6,784,706 - Van Der Valk , et al. August 31, 2 | 2004-08-31 |
Flexible decimator App 20030177156 - Van Der Valk, Robertus Laurentius ;   et al. | 2003-09-18 |
Method of stabilizing phase-locked loop App 20030137329 - Van Der Valk, Robertus Laurentius ;   et al. | 2003-07-24 |
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