De La Torre; Marites
Patent Applications and Registrations
Patent applications and USPTO patent grants for De La Torre; Marites.The latest application filed is for "solder bump arrangements for large area analog circuitry".
- De La Torre; Marites - Dublin IE
| Patent | Date |
|---|---|
| Solder bump arrangements for large area analog circuitry Grant 9,343,418 - Lowney , et al. May 17, 2 | 2016-05-17 |
| Package integrity monitor with sacrificial bumps Grant 9,128,148 - Lowney , et al. September 8, 2 | 2015-09-08 |
| Solder Bump Arrangements For Large Area Analog Circuitry App 20150123265 - Lowney; Donnacha ; et al. | 2015-05-07 |
| Package Integrity Monitor With Sacrificial Bumps App 20140253171 - Lowney; Donnacha ; et al. | 2014-09-11 |
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