de Jong; Jan L.

Patent Applications and Registrations

Patent applications and USPTO patent grants for de Jong; Jan L..The latest application filed is for "semiconductor device having bucket-shaped under-bump metallizaton and method of forming same".

Company Profile

0.21.2

de Jong; Jan L. - Cupertino CA
De Jong; Jan L. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Device Having Bucket-shaped Under-bump Metallizaton And Method Of Forming Same App 20150187715 - Hart; Michael J. ; et al.	2015-07-02
Memory array and method of implementing a memory array Grant 8,149,612 - de Jong April 3, 2	2012-04-03
Electrically programmable diffusion fuse Grant 8,102,019 - Tumakha , et al. January 24, 2	2012-01-24
Semiconductor Device Having Bucket-shaped Under-bump Metallization And Method Of Forming Same App 20110210443 - Hart; Michael J. ; et al.	2011-09-01
Method for fabrication of a semiconductor device and structure Grant 7,964,916 - Or-Bach , et al. June 21, 2	2011-06-21
Memory array and method of implementing a memory array Grant 7,948,791 - de Jong May 24, 2	2011-05-24
Memory cell with single-event-upset tolerance Grant 7,638,822 - de Jong , et al. December 29, 2	2009-12-29
Interleaved memory cell with single-event-upset tolerance Grant 7,515,452 - de Jong , et al. April 7, 2	2009-04-07
Single event upset in SRAM cells in FPGAs with high resistivity gate structures Grant 7,452,765 - Voogel , et al. November 18, 2	2008-11-18
Method and apparatus for compensating for process variations Grant 7,453,311 - Hart , et al. November 18, 2	2008-11-18
Circuit for and method of detecting a defect in a component formed in a substrate of an integrated circuit Grant 7,429,867 - de Jong September 30, 2	2008-09-30
Test circuit and method of use thereof for the manufacture of integrated circuits Grant 7,312,625 - Paak , et al. December 25, 2	2007-12-25
Single event upset tolerant memory cell layout Grant 7,139,190 - de Jong November 21, 2	2006-11-21
Methods of implementing phase shift mask compliant static memory cell circuits Grant 7,109,751 - de Jong September 19, 2	2006-09-19
Static memory cell circuit with single bit line and set/reset write function Grant 7,053,652 - de Jong May 30, 2	2006-05-30
Electrical fuse for integrated circuits Grant 7,002,219 - de Jong , et al. February 21, 2	2006-02-21
Single event upset in SRAM cells in FPGAs with high resistivity gate structures Grant 6,982,451 - Voogel , et al. January 3, 2	2006-01-03
Structures and methods for determining the effects of high stress currents on conducting layers and contacts in integrated circuits Grant 6,867,580 - de Jong , et al. March 15, 2	2005-03-15
Method of generating an IC mask using a reduced database Grant 6,868,537 - Ho , et al. March 15, 2	2005-03-15
Structures and methods for determining the effects of high stress currents on conducting layers and contacts in integrated circuits Grant 6,842,019 - de Jong , et al. January 11, 2	2005-01-11
Ballast resistor with reduced area for ESD protection Grant 6,740,936 - Gitlin , et al. May 25, 2	2004-05-25
Structures and methods for determining the effects of high stress currents on conducting layers and contacts in integrated circuits Grant 6,727,710 - de Jong , et al. April 27, 2	2004-04-27
Transistor manufacturing process using three-step base doping Grant 5,006,476 - De Jong , et al. April 9, 1	1991-04-09

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