Davis; Neal L.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Davis; Neal L..The latest application filed is for "methods of forming semiconductor constructions".

Company Profile

0.8.6

Davis; Neal L. - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods of forming semiconductor constructions Grant 9,373,636 - Davis , et al. June 21, 2	2016-06-21
Methods of Forming Semiconductor Constructions App 20160071878 - Davis; Neal L. ; et al.	2016-03-10
Semiconductor constructions Grant 9,178,077 - Davis , et al. November 3, 2	2015-11-03
Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate Grant 8,796,086 - Davis , et al. August 5, 2	2014-08-05
Semiconductor Constructions and Methods of Forming Semiconductor Constructions App 20140131784 - Davis; Neal L. ; et al.	2014-05-15
Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate App 20140045317 - Davis; Neal L. ; et al.	2014-02-13
Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate Grant 8,586,429 - Davis , et al. November 19, 2	2013-11-19
Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate Grant 8,389,353 - Davis , et al. March 5, 2	2013-03-05
Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate App 20130005115 - Davis; Neal L. ; et al.	2013-01-03
Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate App 20120021573 - Davis; Neal L. ; et al.	2012-01-26
Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate Grant 8,039,340 - Davis , et al. October 18, 2	2011-10-18
Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate App 20110223734 - Davis; Neal L. ; et al.	2011-09-15

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