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name:-0.0028131008148193
name:-0.0259108543396
name:-0.00055098533630371
Davis; Brennan V. Patent Filings

Davis; Brennan V.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Davis; Brennan V..The latest application filed is for "soi die analysis of circuitry logic states via coupling through the insulator".

Company Profile
0.23.1
  • Davis; Brennan V. - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Optical analysis of integrated circuits
Grant 7,019,511 - Birdsley , et al. March 28, 2
2006-03-28
Indirect stimulation of an integrated circuit die
Grant 6,870,379 - Davis , et al. March 22, 2
2005-03-22
IC die analysis via back side lens
Grant 6,864,972 - Birdsley , et al. March 8, 2
2005-03-08
Semiconductor die analysis via fiber optic communication
Grant 6,850,081 - Birdsley , et al. February 1, 2
2005-02-01
Fiber optic semiconductor analysis arrangement and method therefor
Grant 6,844,928 - Gilfeather , et al. January 18, 2
2005-01-18
Substrate removal as a function of emitted photons at the back side of a semiconductor chip
Grant 6,806,166 - Birdsley , et al. October 19, 2
2004-10-19
Real-time photoemission detection system
Grant 6,724,928 - Davis April 20, 2
2004-04-20
Semiconductor analysis arrangement and method therefor
Grant 6,700,659 - Chunduri , et al. March 2, 2
2004-03-02
Defect detection in semiconductor devices
Grant 6,686,757 - Ring , et al. February 3, 2
2004-02-03
Semiconductor analysis arrangement and method therefor
Grant 6,635,839 - Gilfeather , et al. October 21, 2
2003-10-21
SOI die analysis of circuitry logic states via coupling through the insulator
Grant 6,621,281 - Birdsley , et al. September 16, 2
2003-09-16
IC die analysis via back side circuit construction with heat dissipation
Grant 6,576,484 - Birdsley , et al. June 10, 2
2003-06-10
Test fixture for future integration
Grant 6,500,699 - Birdsley , et al. December 31, 2
2002-12-31
Quadrant avalanche photodiode time-resolved detection
Grant 6,483,327 - Bruce , et al. November 19, 2
2002-11-19
Arrangement and method for using electron channeling patterns to detect substrate damage
Grant 6,452,176 - Davis September 17, 2
2002-09-17
Circuit access and analysis for a SOI flip-chip die
Grant 6,448,095 - Birdsley , et al. September 10, 2
2002-09-10
SOI die analysis of circuitry logic states via coupling through the insulator
App 20020084792 - Birdsley, Jeffrey D. ;   et al.
2002-07-04
Selective state change analysis of a SOI die
Grant 6,414,335 - Goruganthu , et al. July 2, 2
2002-07-02
Selectively activatable solar cells for integrated circuit analysis
Grant 6,391,664 - Goruganthu , et al. May 21, 2
2002-05-21
Integrated circuit defect detection via laser heat and IR thermography
Grant 6,387,715 - Davis , et al. May 14, 2
2002-05-14
Substrate removal as a functional of sonic analysis
Grant 6,350,624 - Goruganthu , et al. February 26, 2
2002-02-26
Substrate removal as a function of resistance at the back side of a semiconductor device
Grant 6,303,396 - Ring , et al. October 16, 2
2001-10-16
Substrate removal as a function of SIMS analysis
Grant 6,281,025 - Ring , et al. August 28, 2
2001-08-28
Led in substrate with back side monitoring
Grant 6,248,600 - Bruce , et al. June 19, 2
2001-06-19

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