loadpatents
Patent applications and USPTO patent grants for Davies, Jr.; Thomas J..The latest application filed is for "non-volatile memory read-check".
Patent | Date |
---|---|
Non-volatile memory read-check Grant 7,746,699 - Edwards , et al. June 29, 2 | 2010-06-29 |
Method and apparatus for providing secure programmable logic devices Grant 7,536,559 - Jenkins, IV , et al. May 19, 2 | 2009-05-19 |
Single transistor non-volatile memory system, design, and operation Grant 7,016,219 - Davies, Jr. March 21, 2 | 2006-03-21 |
Non-volatile product term (pterm) cell Grant 6,963,222 - Davies, Jr. November 8, 2 | 2005-11-08 |
Low-voltage non-degenerative transmitter circuit Grant 6,842,041 - Om'Mani , et al. January 11, 2 | 2005-01-11 |
Dual stage level shifter for low voltage operation Grant 6,838,924 - Davies, Jr. January 4, 2 | 2005-01-04 |
Automatic program- and erase-voltage generation for EEPROM cells Grant 6,717,859 - Om'Mani , et al. April 6, 2 | 2004-04-06 |
Programming on-the-fly (OTF) Grant 6,714,041 - Darling , et al. March 30, 2 | 2004-03-30 |
Low-voltage non-degenerative transmitter circuit Grant 6,603,331 - Om'Mani , et al. August 5, 2 | 2003-08-05 |
Programmable integrated-circuit switch Grant 5,452,229 - Shankar , et al. September 19, 1 | 1995-09-19 |
Dynamic TTL input comparator for CMOS devices Grant 4,485,317 - Davies, Jr. November 27, 1 | 1984-11-27 |
Programmable output buffer Grant 4,481,432 - Davies, Jr. November 6, 1 | 1984-11-06 |
Tri-level input buffer Grant 4,449,065 - Davies, Jr. May 15, 1 | 1984-05-15 |
Digitally synthesized back-up frequency Grant 4,104,538 - Davies, Jr. August 1, 1 | 1978-08-01 |
Incrementer/decrementer circuit Grant 4,075,464 - Davies, Jr. February 21, 1 | 1978-02-21 |
Multiple Phase Clock Generator Circuit With Control Circuit Grant 3,740,660 - Davies, Jr. June 19, 1 | 1973-06-19 |
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