Dao Trong; Son

Patent Applications and Registrations

Patent applications and USPTO patent grants for Dao Trong; Son.The latest application filed is for "optimized structure for hexadecimal and binary multiplier array".

Company Profile

0.10.7

Dao Trong; Son - Stuttgart DE
Dao Trong; Son - Boeblingen DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Optimized structure for hexadecimal and binary multiplier array Grant 9,720,648 - Mueller , et al. August 1, 2	2017-08-01
Optimized structure for hexadecimal and binary multiplier array Grant 9,563,400 - Mueller , et al. February 7, 2	2017-02-07
Fused multiply add pipeline Grant 9,430,190 - Dao Trong , et al. August 30, 2	2016-08-30
Optimized Structure For Hexadecimal And Binary Multiplier Array App 20160085509 - Mueller; Silvia M. ; et al.	2016-03-24
Optimized Structure For Hexadecimal And Binary Multiplier Array App 20160085508 - Mueller; Silvia M. ; et al.	2016-03-24
Fused Multiply Add Pipeline App 20140244704 - DAO TRONG; SON ; et al.	2014-08-28
System and method for a floating point unit with feedback prior to normalization and rounding Grant 7,730,117 - Fleischer , et al. June 1, 2	2010-06-01
System and method for performing floating point store folding Grant 7,188,233 - Haess , et al. March 6, 2	2007-03-06
System and method for a fused multiply-add dataflow with early feedback prior to rounding App 20060179096 - Fleischer; Bruce M. ; et al.	2006-08-10
System and method for a floating point unit with feedback prior to normalization and rounding App 20060179097 - Fleischer; Bruce M. ; et al.	2006-08-10
System and method for processing limited out-of-order execution of floating point loads App 20060179286 - Haess; Juergen ; et al.	2006-08-10
System and method for performing floating point store folding App 20060179100 - Haess; Juergen ; et al.	2006-08-10
Multiple application chip card with decoupled programs Grant 5,912,453 - Gungl , et al. June 15, 1	1999-06-15
Carry-select adder with pre-counting of leading zero digits Grant 5,875,123 - Dao Trong , et al. February 23, 1	1999-02-23
Fast multiply-add instruction sequence in a pipeline floating-point processor Grant 5,517,438 - Dao-Trong , et al. May 14, 1	1996-05-14
Self-checking complementary adder unit Grant 5,506,800 - Dao-Trong April 9, 1	1996-04-09
Digital circuit for calculating a logarithm of a number Grant 5,363,321 - Dao Trong , et al. November 8, 1	1994-11-08

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